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[mips][ias] N32/N64 must not sort the relocation table.

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Doing so changes the evaluation order for relocation composition.

Patch By: Daniel Sanders

Reviewers: vkalintiris, atanasyan

Differential Revision: https://reviews.llvm.org/D26401

llvm-svn: 288666
This commit is contained in:
Simon Dardis 2016-12-05 12:55:19 +00:00
parent d28e448e11
commit ec1372dab4
2 changed files with 17 additions and 2 deletions
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7
lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
View File

@ -419,6 +419,13 @@ unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
/// always match using the expressions from the source.
void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm,
std::vector<ELFRelocationEntry> &Relocs) {
// We do not need to sort the relocation table for RELA relocations which
// N32/N64 uses as the relocation addend contains the value we require,
// rather than it being split across a pair of relocations.
if (hasRelocationAddend())
return;
if (Relocs.size() < 2)
return;

12
test/MC/Mips/reloc-directive.s
View File

@ -43,16 +43,24 @@ foo:
# OBJ-N32: 0000: 00000000 00000000 00000000
# OBJ-N32-LABEL: }
# OBJ-N32-LABEL: Relocations [
# OBJ-N32: 0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
# OBJ-N32: 0x4 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x0
# OBJ-N32: 0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
# OBJ-N32: 0x8 R_MIPS_32/R_MIPS_NONE/R_MIPS_NONE .text 0x8
# OBJ-N32: 0xC R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE - 0x0
# FIXME:This is the correct output for reference.
# OBJ-N32-FIXME: 0x4 R_MIPS_NONE .text 0x0
# OBJ-N32-FIXME: 0x0 R_MIPS_NONE .text 0x4
# OBJ-N32-FIXME: 0x8 R_MIPS_32 .text 0x8
# OBJ-N32-FIXME: 0xC R_MIPS_NONE - 0x0
# OBJ-N64-LABEL: Name: .text
# OBJ-N64: 0000: 00000000 00000000 00000000
# OBJ-N64-LABEL: }
# OBJ-N64-LABEL: Relocations [
# OBJ-N64: 0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
# OBJ-N64: 0x4 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x0
# OBJ-N64: 0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
# OBJ-N64: 0x8 R_MIPS_32/R_MIPS_NONE/R_MIPS_NONE .text 0x8
# OBJ-N64: 0xC R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE - 0x0