From ec657b923df37503a8e2e6958afa2cf4b9d5dde3 Mon Sep 17 00:00:00 2001 From: Nekotekina Date: Sun, 21 Apr 2019 12:32:17 +0300 Subject: [PATCH] X86: avoid vector-scalar shifts if splat amount is directly a vector ADD/SUB/AND op. Prefer vector-vector shifts if available (AVX2+). Improves code generated for rotate and funnel shifts. Otherwise it would generate a shuffle + slower vector-scalar shift. --- lib/Target/X86/X86ISelLowering.cpp | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 0387cc2fa5d..09a32d1c422 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -27131,6 +27131,16 @@ static SDValue LowerScalarVariableShift(SDValue Op, SelectionDAG &DAG, if (SDValue BaseShAmt = DAG.getSplatValue(Amt)) { if (SupportedVectorShiftWithBaseAmnt(VT, Subtarget, Opcode)) { + if (SupportedVectorVarShift(VT, Subtarget, Opcode)) { + // Avoid vector-scalar shift in some cases (TODO). + unsigned AmtOp = Amt.getOpcode(); + switch (AmtOp) { + case ISD::ADD: + case ISD::SUB: + case ISD::AND: + return SDValue(); + } + } MVT EltVT = VT.getVectorElementType(); assert(EltVT.bitsLE(MVT::i64) && "Unexpected element type!"); if (EltVT != MVT::i64 && EltVT.bitsGT(MVT::i32))