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TLI: Allow using PSV for intrinsic mem operands
llvm-svn: 320756
This commit is contained in:
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7655f081e8
commit
ec7e75e600
@ -47,7 +47,7 @@ struct MachinePointerInfo {
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uint8_t StackID;
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uint8_t StackID;
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unsigned AddrSpace;
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unsigned AddrSpace = 0;
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explicit MachinePointerInfo(const Value *v, int64_t offset = 0,
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explicit MachinePointerInfo(const Value *v, int64_t offset = 0,
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uint8_t ID = 0)
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uint8_t ID = 0)
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@ -65,6 +65,19 @@ struct MachinePointerInfo {
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: V((const Value *)nullptr), Offset(0), StackID(0),
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: V((const Value *)nullptr), Offset(0), StackID(0),
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AddrSpace(AddressSpace) {}
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AddrSpace(AddressSpace) {}
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explicit MachinePointerInfo(
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PointerUnion<const Value *, const PseudoSourceValue *> v,
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int64_t offset = 0,
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uint8_t ID = 0)
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: V(v), Offset(offset), StackID(ID) {
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if (V) {
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if (const auto *ValPtr = V.dyn_cast<const Value*>())
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AddrSpace = ValPtr->getType()->getPointerAddressSpace();
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else
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AddrSpace = V.get<const PseudoSourceValue*>()->getAddressSpace();
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}
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}
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MachinePointerInfo getWithOffset(int64_t O) const {
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MachinePointerInfo getWithOffset(int64_t O) const {
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if (V.isNull())
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if (V.isNull())
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return MachinePointerInfo(AddrSpace);
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return MachinePointerInfo(AddrSpace);
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@ -702,7 +702,10 @@ public:
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struct IntrinsicInfo {
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struct IntrinsicInfo {
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unsigned opc = 0; // target opcode
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unsigned opc = 0; // target opcode
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EVT memVT; // memory VT
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EVT memVT; // memory VT
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const Value* ptrVal = nullptr; // value representing memory location
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// value representing memory location
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PointerUnion<const Value *, const PseudoSourceValue *> ptrVal;
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int offset = 0; // offset off of ptrVal
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int offset = 0; // offset off of ptrVal
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unsigned size = 0; // the size of the memory location
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unsigned size = 0; // the size of the memory location
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// (taken from memVT if zero)
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// (taken from memVT if zero)
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@ -717,6 +720,7 @@ public:
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/// true and store the intrinsic information into the IntrinsicInfo that was
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/// true and store the intrinsic information into the IntrinsicInfo that was
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/// passed to the function.
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/// passed to the function.
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virtual bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &,
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virtual bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &,
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MachineFunction &,
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unsigned /*Intrinsic*/) const {
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unsigned /*Intrinsic*/) const {
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return false;
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return false;
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}
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}
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@ -851,7 +851,7 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
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const TargetLowering &TLI = *MF->getSubtarget().getTargetLowering();
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const TargetLowering &TLI = *MF->getSubtarget().getTargetLowering();
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TargetLowering::IntrinsicInfo Info;
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TargetLowering::IntrinsicInfo Info;
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// TODO: Add a GlobalISel version of getTgtMemIntrinsic.
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// TODO: Add a GlobalISel version of getTgtMemIntrinsic.
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if (TLI.getTgtMemIntrinsic(Info, CI, ID)) {
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if (TLI.getTgtMemIntrinsic(Info, CI, *MF, ID)) {
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uint64_t Size = Info.memVT.getStoreSize();
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uint64_t Size = Info.memVT.getStoreSize();
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MIB.addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Info.ptrVal),
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MIB.addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Info.ptrVal),
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Info.flags, Size, Info.align));
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Info.flags, Size, Info.align));
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@ -4214,7 +4214,9 @@ void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I,
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// Info is set by getTgtMemInstrinsic
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// Info is set by getTgtMemInstrinsic
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TargetLowering::IntrinsicInfo Info;
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TargetLowering::IntrinsicInfo Info;
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const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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bool IsTgtIntrinsic = TLI.getTgtMemIntrinsic(Info, I, Intrinsic);
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bool IsTgtIntrinsic = TLI.getTgtMemIntrinsic(Info, I,
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DAG.getMachineFunction(),
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Intrinsic);
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// Add the intrinsic ID as an integer operand if it's not a target intrinsic.
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// Add the intrinsic ID as an integer operand if it's not a target intrinsic.
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if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID ||
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if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID ||
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@ -7371,6 +7371,7 @@ SDValue AArch64TargetLowering::LowerVECREDUCE(SDValue Op,
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/// specified in the intrinsic calls.
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/// specified in the intrinsic calls.
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bool AArch64TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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bool AArch64TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &I,
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const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const {
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unsigned Intrinsic) const {
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auto &DL = I.getModule()->getDataLayout();
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auto &DL = I.getModule()->getDataLayout();
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switch (Intrinsic) {
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switch (Intrinsic) {
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@ -306,6 +306,7 @@ public:
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MachineBasicBlock *MBB) const override;
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MachineBasicBlock *MBB) const override;
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const override;
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unsigned Intrinsic) const override;
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bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
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bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
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@ -558,6 +558,7 @@ bool SITargetLowering::isShuffleMaskLegal(ArrayRef<int>, EVT) const {
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bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &CI,
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const CallInst &CI,
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MachineFunction &MF,
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unsigned IntrID) const {
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unsigned IntrID) const {
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switch (IntrID) {
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switch (IntrID) {
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case Intrinsic::amdgcn_atomic_inc:
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case Intrinsic::amdgcn_atomic_inc:
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@ -152,6 +152,7 @@ public:
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bool isShuffleMaskLegal(ArrayRef<int> /*Mask*/, EVT /*VT*/) const override;
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bool isShuffleMaskLegal(ArrayRef<int> /*Mask*/, EVT /*VT*/) const override;
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bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &,
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bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &,
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MachineFunction &MF,
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unsigned IntrinsicID) const override;
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unsigned IntrinsicID) const override;
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bool getAddrModeArguments(IntrinsicInst * /*I*/,
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bool getAddrModeArguments(IntrinsicInst * /*I*/,
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@ -13588,6 +13588,7 @@ bool ARMTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
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/// specified in the intrinsic calls.
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/// specified in the intrinsic calls.
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bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &I,
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const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const {
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unsigned Intrinsic) const {
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switch (Intrinsic) {
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switch (Intrinsic) {
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case Intrinsic::arm_neon_vld1:
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case Intrinsic::arm_neon_vld1:
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@ -470,6 +470,7 @@ class VectorType;
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bool getTgtMemIntrinsic(IntrinsicInfo &Info,
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bool getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &I,
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const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const override;
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unsigned Intrinsic) const override;
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/// \brief Returns true if it is beneficial to convert a load of a constant
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/// \brief Returns true if it is beneficial to convert a load of a constant
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@ -2261,6 +2261,7 @@ const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const {
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/// passed to the function.
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/// passed to the function.
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bool HexagonTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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bool HexagonTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &I,
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const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const {
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unsigned Intrinsic) const {
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switch (Intrinsic) {
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switch (Intrinsic) {
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case Intrinsic::hexagon_V6_vgathermw:
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case Intrinsic::hexagon_V6_vgathermw:
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@ -103,6 +103,7 @@ namespace HexagonISD {
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const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const;
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const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const;
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const override;
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unsigned Intrinsic) const override;
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bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
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bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
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@ -3314,7 +3314,8 @@ static unsigned getOpcForSurfaceInstr(unsigned Intrinsic) {
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// of destination
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// of destination
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// pointer. In particular, the address space information.
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// pointer. In particular, the address space information.
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bool NVPTXTargetLowering::getTgtMemIntrinsic(
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bool NVPTXTargetLowering::getTgtMemIntrinsic(
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IntrinsicInfo &Info, const CallInst &I, unsigned Intrinsic) const {
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IntrinsicInfo &Info, const CallInst &I,
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MachineFunction &MF, unsigned Intrinsic) const {
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switch (Intrinsic) {
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switch (Intrinsic) {
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default:
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default:
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return false;
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return false;
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@ -448,6 +448,7 @@ public:
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const char *getTargetNodeName(unsigned Opcode) const override;
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const char *getTargetNodeName(unsigned Opcode) const override;
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const override;
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unsigned Intrinsic) const override;
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/// isLegalAddressingMode - Return true if the addressing mode represented
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/// isLegalAddressingMode - Return true if the addressing mode represented
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@ -13295,6 +13295,7 @@ PPCTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
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bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &I,
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const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const {
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unsigned Intrinsic) const {
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switch (Intrinsic) {
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switch (Intrinsic) {
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case Intrinsic::ppc_qpx_qvlfd:
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case Intrinsic::ppc_qpx_qvlfd:
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@ -773,6 +773,7 @@ namespace llvm {
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bool getTgtMemIntrinsic(IntrinsicInfo &Info,
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bool getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &I,
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const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const override;
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unsigned Intrinsic) const override;
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/// getOptimalMemOpType - Returns the target specific optimal type for load
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/// getOptimalMemOpType - Returns the target specific optimal type for load
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@ -4483,6 +4483,7 @@ static bool hasFPCMov(unsigned X86CC) {
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bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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const CallInst &I,
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const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const {
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unsigned Intrinsic) const {
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const IntrinsicData* IntrData = getIntrinsicWithChain(Intrinsic);
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const IntrinsicData* IntrData = getIntrinsicWithChain(Intrinsic);
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@ -965,6 +965,7 @@ namespace llvm {
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/// true and stores the intrinsic information into the IntrinsicInfo that was
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/// true and stores the intrinsic information into the IntrinsicInfo that was
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/// passed to the function.
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/// passed to the function.
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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MachineFunction &MF,
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unsigned Intrinsic) const override;
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unsigned Intrinsic) const override;
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/// Returns true if the target can instruction select the
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/// Returns true if the target can instruction select the
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