RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00
Code Issues Projects Releases Wiki Activity

Make pattern isel default for ppc

Browse Source 
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default

llvm-svn: 21309
This commit is contained in:
Nate Begeman 2005-04-15 22:12:16 +00:00
parent 8456833fa8
commit ecb5b5c028
6 changed files with 43 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
include/llvm/Target/TargetOptions.h
View File

@ -34,6 +34,13 @@ namespace llvm {
/// over the place.
extern bool NoExcessFPPrecision;
/// PatternISelTriState - This flag is enabled when -pattern-isel=X is
/// specified on the command line. The default value is 2, in which case the
/// target chooses what is best for it. Setting X to 0 forces the use of
/// a simple ISel if available, while setting it to 1 forces the use of a
/// pattern ISel if available.
extern int PatternISelTriState;
} // End llvm namespace
#endif

5
lib/Target/PowerPC/PPC32ISelPattern.cpp
View File

@ -1067,7 +1067,7 @@ unsigned ISel::SelectCC(SDOperand CC, unsigned &Opc) {
BuildMI(BB, CompareOpc, 2, Result).addReg(Tmp1).addReg(Tmp2);
}
} else {
#if 0
if (PPCCRopts)
if (CC.getOpcode() == ISD::AND || CC.getOpcode() == ISD::OR)
if (CC.getOperand(0).Val->hasOneUse() &&
CC.getOperand(1).Val->hasOneUse()) {
@ -1093,7 +1093,6 @@ unsigned ISel::SelectCC(SDOperand CC, unsigned &Opc) {
return Result;
}
}
#endif
Opc = PPC::BNE;
Tmp1 = SelectExpr(CC);
BuildMI(BB, PPC::CMPLWI, 2, Result).addReg(Tmp1).addImm(0);
@ -1127,7 +1126,7 @@ void ISel::SelectBranchCC(SDOperand N)
unsigned Opc, CCReg;
Select(N.getOperand(0)); //chain
CCReg = SelectCC(N.getOperand(1), Opc);
// Iterate to the next basic block, unless we're already at the end of the
ilist<MachineBasicBlock>::iterator It = BB, E = BB->getParent()->end();
if (++It == E) It = BB;

1
lib/Target/PowerPC/PowerPC.h
View File

@ -29,6 +29,7 @@ FunctionPass *createPPC64ISelPattern(TargetMachine &TM);
FunctionPass *createDarwinAsmPrinter(std::ostream &OS, TargetMachine &TM);
FunctionPass *createAIXAsmPrinter(std::ostream &OS, TargetMachine &TM);
extern bool PPCCRopts;
} // end namespace llvm;
// GCC #defines PPC on Linux but we use it as our namespace name

29
lib/Target/PowerPC/PowerPCTargetMachine.cpp
View File

@ -30,15 +30,18 @@
using namespace llvm;
namespace llvm {
bool PPCCRopts;
cl::opt<bool> AIX("aix",
cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
cl::Hidden);
cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc",
cl::desc("Enable LSR for PPC (beta option!)"),
cl::desc("Enable LSR for PPC (beta)"),
cl::Hidden);
cl::opt<bool> EnablePatternISel("enable-ppc-pattern-isel", cl::Hidden,
cl::desc("Enable the pattern isel"));
cl::opt<bool, true> EnablePPCCRopts("enable-cc-opts",
cl::desc("Enable opts using condition regs (beta)"),
cl::location(PPCCRopts),
cl::init(false),
cl::Hidden);
}
namespace {
@ -96,12 +99,13 @@ bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// Default to pattern ISel
if (LP64)
PM.add(createPPC64ISelPattern(*this));
else if (EnablePatternISel)
PM.add(createPPC32ISelPattern(*this));
else
else if (PatternISelTriState == 0)
PM.add(createPPC32ISelSimple(*this));
else
PM.add(createPPC32ISelPattern(*this));
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
@ -126,6 +130,8 @@ bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
}
void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(&TM));
if (EnablePPCLSR) {
PM.add(createLoopStrengthReducePass());
PM.add(createCFGSimplificationPass());
@ -145,7 +151,14 @@ void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createPPC32ISelSimple(TM));
// Default to pattern ISel
if (LP64)
PM.add(createPPC64ISelPattern(TM));
else if (PatternISelTriState == 0)
PM.add(createPPC32ISelSimple(TM));
else
PM.add(createPPC32ISelPattern(TM));
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());

11
lib/Target/TargetMachine.cpp
View File

@ -25,6 +25,7 @@ namespace llvm {
bool PrintMachineCode;
bool NoFramePointerElim;
bool NoExcessFPPrecision;
int PatternISelTriState;
};
namespace {
cl::opt<bool, true> PrintCode("print-machineinstrs",
@ -38,9 +39,13 @@ namespace {
cl::init(false));
cl::opt<bool, true>
DisableExcessPrecision("disable-excess-fp-precision",
cl::desc("Disable optimizations that may increase FP precision"),
cl::location(NoExcessFPPrecision),
cl::init(false));
cl::desc("Disable optimizations that may increase FP precision"),
cl::location(NoExcessFPPrecision),
cl::init(false));
cl::opt<int, true> PatternISel("enable-pattern-isel",
cl::desc("sets the pattern ISel off(0), on(1), default(2)"),
cl::location(PatternISelTriState),
cl::init(2));
};
//---------------------------------------------------------------------------

9
lib/Target/X86/X86TargetMachine.cpp
View File

@ -41,9 +41,6 @@ namespace {
cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
cl::desc("Disable the X86 asm printer, for use "
"when profiling the code generator."));
cl::opt<bool> DisablePatternISel("disable-pattern-isel", cl::Hidden,
cl::desc("Disable the pattern isel XXX FIXME"),
cl::init(true));
#if 0
// FIXME: This should eventually be handled with target triples and
@ -113,7 +110,8 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
if (DisablePatternISel)
// Default to simple ISel
if (PatternISelTriState != 1)
PM.add(createX86SimpleInstructionSelector(*this));
else
PM.add(createX86PatternInstructionSelector(*this));
@ -171,7 +169,8 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
if (DisablePatternISel)
// Default to simple ISel
if (PatternISelTriState != 1)
PM.add(createX86SimpleInstructionSelector(TM));
else
PM.add(createX86PatternInstructionSelector(TM));