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AArch64: implement support for blockaddress in large code model
llvm-svn: 181118
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@ -1667,17 +1667,26 @@ AArch64TargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
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EVT PtrVT = getPointerTy();
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const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
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assert(getTargetMachine().getCodeModel() == CodeModel::Small
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&& "Only small code model supported at the moment");
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// The most efficient code is PC-relative anyway for the small memory model,
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// so we don't need to worry about relocation model.
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return DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
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DAG.getTargetBlockAddress(BA, PtrVT, 0,
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AArch64II::MO_NO_FLAG),
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DAG.getTargetBlockAddress(BA, PtrVT, 0,
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AArch64II::MO_LO12),
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DAG.getConstant(/*Alignment=*/ 4, MVT::i32));
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switch(getTargetMachine().getCodeModel()) {
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case CodeModel::Small:
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// The most efficient code is PC-relative anyway for the small memory model,
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// so we don't need to worry about relocation model.
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return DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
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DAG.getTargetBlockAddress(BA, PtrVT, 0,
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AArch64II::MO_NO_FLAG),
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DAG.getTargetBlockAddress(BA, PtrVT, 0,
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AArch64II::MO_LO12),
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DAG.getConstant(/*Alignment=*/ 4, MVT::i32));
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case CodeModel::Large:
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return DAG.getNode(
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AArch64ISD::WrapperLarge, DL, PtrVT,
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DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_ABS_G3),
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DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_ABS_G2_NC),
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DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_ABS_G1_NC),
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DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_ABS_G0_NC));
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default:
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llvm_unreachable("Only small and large code models supported now");
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}
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}
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@ -1,4 +1,5 @@
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; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -code-model=large -mtriple=aarch64-none-linux-gnu -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-LARGE %s
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@addr = global i8* null
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@ -13,6 +14,14 @@ define void @test_blockaddress() {
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; CHECK: ldr [[NEWDEST:x[0-9]+]]
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; CHECK: br [[NEWDEST]]
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; CHECK-LARGE: movz [[ADDR_REG:x[0-9]+]], #:abs_g3:[[DEST_LBL:.Ltmp[0-9]+]]
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; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g2_nc:[[DEST_LBL]]
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; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g1_nc:[[DEST_LBL]]
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; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g0_nc:[[DEST_LBL]]
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; CHECK-LARGE: str [[ADDR_REG]],
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; CHECK-LARGE: ldr [[NEWDEST:x[0-9]+]]
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; CHECK-LARGE: br [[NEWDEST]]
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block:
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ret void
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}
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