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AArch64: add apple-a14 as a CPU
This CPU supports all v8.5a features except BTI, and so identifies as v8.5a to Clang. A bit weird, but the best way for things like xnu to detect the new features it cares about.
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@ -189,6 +189,8 @@ AARCH64_CPU_NAME("apple-a12", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
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(AArch64::AEK_FP16))
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AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
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(AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
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AARCH64_CPU_NAME("apple-a14", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false,
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(AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
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AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
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(AArch64::AEK_FP16))
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AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
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@ -854,6 +854,38 @@ def ProcAppleA13 : SubtargetFeature<"apple-a13", "ARMProcFamily", "AppleA13",
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HasV8_4aOps
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]>;
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def ProcAppleA14 : SubtargetFeature<"apple-a14", "ARMProcFamily", "AppleA14",
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"Apple A14", [
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FeatureAggressiveFMA,
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FeatureAlternateSExtLoadCVTF32Pattern,
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FeatureAltFPCmp,
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FeatureArithmeticBccFusion,
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FeatureArithmeticCbzFusion,
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FeatureCrypto,
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FeatureDisableLatencySchedHeuristic,
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FeatureFPARMv8,
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FeatureFRInt3264,
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FeatureFuseAddress,
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FeatureFuseAES,
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FeatureFuseArithmeticLogic,
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FeatureFuseCCSelect,
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FeatureFuseCryptoEOR,
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FeatureFuseLiterals,
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FeatureNEON,
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FeaturePerfMon,
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FeatureSpecRestrict,
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FeatureSSBS,
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FeatureSB,
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FeaturePredRes,
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FeatureCacheDeepPersist,
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FeatureZCRegMove,
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FeatureZCZeroing,
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FeatureFullFP16,
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FeatureFP16FML,
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FeatureSHA3,
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HasV8_4aOps
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]>;
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def ProcExynosM3 : SubtargetFeature<"exynosm3", "ARMProcFamily", "ExynosM3",
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"Samsung Exynos-M3 processors",
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[FeatureCRC,
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@ -1147,6 +1179,7 @@ def : ProcessorModel<"apple-a10", CycloneModel, [ProcAppleA10]>;
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def : ProcessorModel<"apple-a11", CycloneModel, [ProcAppleA11]>;
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def : ProcessorModel<"apple-a12", CycloneModel, [ProcAppleA12]>;
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def : ProcessorModel<"apple-a13", CycloneModel, [ProcAppleA13]>;
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def : ProcessorModel<"apple-a14", CycloneModel, [ProcAppleA14]>;
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// watch CPUs.
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def : ProcessorModel<"apple-s4", CycloneModel, [ProcAppleA12]>;
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@ -122,6 +122,7 @@ void AArch64Subtarget::initializeProperties() {
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case AppleA11:
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case AppleA12:
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case AppleA13:
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case AppleA14:
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CacheLineSize = 64;
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PrefetchDistance = 280;
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MinPrefetchStride = 2048;
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@ -45,6 +45,7 @@ public:
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AppleA11,
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AppleA12,
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AppleA13,
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AppleA14,
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Carmel,
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CortexA35,
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CortexA53,
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@ -1043,6 +1043,14 @@ INSTANTIATE_TEST_CASE_P(
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AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
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AArch64::AEK_FP16FML,
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"8.4-A"),
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ARMCPUTestParams("apple-a14", "armv8.5-a", "crypto-neon-fp-armv8",
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AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
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AArch64::AEK_FP | AArch64::AEK_SIMD |
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AArch64::AEK_LSE | AArch64::AEK_RAS |
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AArch64::AEK_RDM | AArch64::AEK_RCPC |
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AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
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AArch64::AEK_FP16FML,
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"8.5-A"),
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ARMCPUTestParams("apple-s4", "armv8.3-a", "crypto-neon-fp-armv8",
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AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
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AArch64::AEK_FP | AArch64::AEK_SIMD |
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@ -1166,7 +1174,7 @@ INSTANTIATE_TEST_CASE_P(
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AArch64::AEK_LSE | AArch64::AEK_RDM,
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"8.2-A")), );
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static constexpr unsigned NumAArch64CPUArchs = 46;
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static constexpr unsigned NumAArch64CPUArchs = 47;
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TEST(TargetParserTest, testAArch64CPUArchList) {
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SmallVector<StringRef, NumAArch64CPUArchs> List;
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