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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 12:41:49 +01:00

AArch64: add apple-a14 as a CPU

This CPU supports all v8.5a features except BTI, and so identifies as v8.5a to
Clang. A bit weird, but the best way for things like xnu to detect the new
features it cares about.
This commit is contained in:
Tim Northover 2021-01-14 09:09:54 +00:00
parent 12b7677de1
commit ed1f4159c7
5 changed files with 46 additions and 1 deletions

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@ -189,6 +189,8 @@ AARCH64_CPU_NAME("apple-a12", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("apple-a14", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,

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@ -854,6 +854,38 @@ def ProcAppleA13 : SubtargetFeature<"apple-a13", "ARMProcFamily", "AppleA13",
HasV8_4aOps
]>;
def ProcAppleA14 : SubtargetFeature<"apple-a14", "ARMProcFamily", "AppleA14",
"Apple A14", [
FeatureAggressiveFMA,
FeatureAlternateSExtLoadCVTF32Pattern,
FeatureAltFPCmp,
FeatureArithmeticBccFusion,
FeatureArithmeticCbzFusion,
FeatureCrypto,
FeatureDisableLatencySchedHeuristic,
FeatureFPARMv8,
FeatureFRInt3264,
FeatureFuseAddress,
FeatureFuseAES,
FeatureFuseArithmeticLogic,
FeatureFuseCCSelect,
FeatureFuseCryptoEOR,
FeatureFuseLiterals,
FeatureNEON,
FeaturePerfMon,
FeatureSpecRestrict,
FeatureSSBS,
FeatureSB,
FeaturePredRes,
FeatureCacheDeepPersist,
FeatureZCRegMove,
FeatureZCZeroing,
FeatureFullFP16,
FeatureFP16FML,
FeatureSHA3,
HasV8_4aOps
]>;
def ProcExynosM3 : SubtargetFeature<"exynosm3", "ARMProcFamily", "ExynosM3",
"Samsung Exynos-M3 processors",
[FeatureCRC,
@ -1147,6 +1179,7 @@ def : ProcessorModel<"apple-a10", CycloneModel, [ProcAppleA10]>;
def : ProcessorModel<"apple-a11", CycloneModel, [ProcAppleA11]>;
def : ProcessorModel<"apple-a12", CycloneModel, [ProcAppleA12]>;
def : ProcessorModel<"apple-a13", CycloneModel, [ProcAppleA13]>;
def : ProcessorModel<"apple-a14", CycloneModel, [ProcAppleA14]>;
// watch CPUs.
def : ProcessorModel<"apple-s4", CycloneModel, [ProcAppleA12]>;

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@ -122,6 +122,7 @@ void AArch64Subtarget::initializeProperties() {
case AppleA11:
case AppleA12:
case AppleA13:
case AppleA14:
CacheLineSize = 64;
PrefetchDistance = 280;
MinPrefetchStride = 2048;

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@ -45,6 +45,7 @@ public:
AppleA11,
AppleA12,
AppleA13,
AppleA14,
Carmel,
CortexA35,
CortexA53,

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@ -1043,6 +1043,14 @@ INSTANTIATE_TEST_CASE_P(
AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_FP16FML,
"8.4-A"),
ARMCPUTestParams("apple-a14", "armv8.5-a", "crypto-neon-fp-armv8",
AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
AArch64::AEK_FP | AArch64::AEK_SIMD |
AArch64::AEK_LSE | AArch64::AEK_RAS |
AArch64::AEK_RDM | AArch64::AEK_RCPC |
AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_FP16FML,
"8.5-A"),
ARMCPUTestParams("apple-s4", "armv8.3-a", "crypto-neon-fp-armv8",
AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
AArch64::AEK_FP | AArch64::AEK_SIMD |
@ -1166,7 +1174,7 @@ INSTANTIATE_TEST_CASE_P(
AArch64::AEK_LSE | AArch64::AEK_RDM,
"8.2-A")), );
static constexpr unsigned NumAArch64CPUArchs = 46;
static constexpr unsigned NumAArch64CPUArchs = 47;
TEST(TargetParserTest, testAArch64CPUArchList) {
SmallVector<StringRef, NumAArch64CPUArchs> List;