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LivePhysReg: Use reference instead of pointer in init(); NFC
llvm-svn: 289002
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bf33e15f26
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@ -60,11 +60,10 @@ public:
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}
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/// \brief Clear and initialize the LivePhysRegs set.
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void init(const TargetRegisterInfo *TRI) {
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assert(TRI && "Invalid TargetRegisterInfo pointer.");
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this->TRI = TRI;
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void init(const TargetRegisterInfo &TRI) {
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this->TRI = &TRI;
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LiveRegs.clear();
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LiveRegs.setUniverse(TRI->getNumRegs());
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LiveRegs.setUniverse(TRI.getNumRegs());
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}
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/// \brief Clears the LivePhysRegs set.
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@ -353,7 +353,7 @@ void BranchFolder::computeLiveIns(MachineBasicBlock &MBB) {
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if (!UpdateLiveIns)
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return;
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LiveRegs.init(TRI);
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LiveRegs.init(*TRI);
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LiveRegs.addLiveOutsNoPristines(MBB);
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for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend()))
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LiveRegs.stepBackward(MI);
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@ -612,7 +612,7 @@ void ExeDepsFix::processUndefReads(MachineBasicBlock *MBB) {
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return;
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// Collect this block's live out register units.
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LiveRegSet.init(TRI);
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LiveRegSet.init(*TRI);
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// We do not need to care about pristine registers as they are just preserved
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// but not actually used in the function.
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LiveRegSet.addLiveOutsNoPristines(*MBB);
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@ -1517,13 +1517,13 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
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// Initialize liveins to the first BB. These are potentiall redefined by
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// predicated instructions.
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Redefs.init(TRI);
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Redefs.init(*TRI);
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Redefs.addLiveIns(CvtMBB);
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Redefs.addLiveIns(NextMBB);
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// Compute a set of registers which must not be killed by instructions in
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// BB1: This is everything live-in to BB2.
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DontKill.init(TRI);
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DontKill.init(*TRI);
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DontKill.addLiveIns(NextMBB);
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if (CvtMBB.pred_size() > 1) {
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@ -1621,7 +1621,7 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
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// Initialize liveins to the first BB. These are potentially redefined by
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// predicated instructions.
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Redefs.init(TRI);
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Redefs.init(*TRI);
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Redefs.addLiveIns(CvtMBB);
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Redefs.addLiveIns(NextMBB);
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@ -1785,7 +1785,7 @@ bool IfConverter::IfConvertDiamondCommon(
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// - BB1 live-out regs need implicit uses before being redefined by BB2
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// instructions. We start with BB1 live-ins so we have the live-out regs
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// after tracking the BB1 instructions.
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Redefs.init(TRI);
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Redefs.init(*TRI);
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Redefs.addLiveIns(MBB1);
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Redefs.addLiveIns(MBB2);
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@ -1811,7 +1811,7 @@ bool IfConverter::IfConvertDiamondCommon(
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// Compute a set of registers which must not be killed by instructions in BB1:
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// This is everything used+live in BB2 after the duplicated instructions. We
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// can compute this set by simulating liveness backwards from the end of BB2.
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DontKill.init(TRI);
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DontKill.init(*TRI);
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for (const MachineInstr &MI : make_range(MBB2.rbegin(), ++DI2.getReverse()))
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DontKill.stepBackward(MI);
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@ -125,7 +125,7 @@ bool StackMapLiveness::calculateLiveness(MachineFunction &MF) {
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// For all basic blocks in the function.
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for (auto &MBB : MF) {
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DEBUG(dbgs() << "****** BB " << MBB.getName() << " ******\n");
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LiveRegs.init(TRI);
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LiveRegs.init(*TRI);
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// FIXME: This should probably be addLiveOuts().
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LiveRegs.addLiveOutsNoPristines(MBB);
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bool HasStackMap = false;
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@ -560,7 +560,7 @@ void ARMLoadStoreOpt::moveLiveRegsBefore(const MachineBasicBlock &MBB,
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MachineBasicBlock::const_iterator Before) {
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// Initialize if we never queried in this block.
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if (!LiveRegsValid) {
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LiveRegs.init(TRI);
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LiveRegs.init(*TRI);
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LiveRegs.addLiveOuts(MBB);
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LiveRegPos = MBB.end();
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LiveRegsValid = true;
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@ -275,7 +275,7 @@ bool SystemZShortenInst::runOnMachineFunction(MachineFunction &F) {
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const SystemZSubtarget &ST = F.getSubtarget<SystemZSubtarget>();
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TII = ST.getInstrInfo();
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TRI = ST.getRegisterInfo();
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LiveRegs.init(TRI);
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LiveRegs.init(*TRI);
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bool Changed = false;
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for (auto &MBB : F)
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@ -154,7 +154,7 @@ bool FixupBWInstPass::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getSubtarget<X86Subtarget>().getInstrInfo();
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OptForSize = MF.getFunction()->optForSize();
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MLI = &getAnalysis<MachineLoopInfo>();
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LiveRegs.init(&TII->getRegisterInfo());
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LiveRegs.init(TII->getRegisterInfo());
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DEBUG(dbgs() << "Start X86FixupBWInsts\n";);
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