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Start using target speficic nodes for shuffles: pshufhw and pshuflw
llvm-svn: 111837
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@ -2558,6 +2558,18 @@ X86TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo) const {
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// Other Lowering Hooks
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// Other Lowering Hooks
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT,
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SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) {
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switch(Opc) {
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default: llvm_unreachable("Unknown x86 shuffle node");
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case X86ISD::PSHUFHW:
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case X86ISD::PSHUFLW:
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return DAG.getNode(Opc, dl, VT, V1, DAG.getConstant(TargetMask, MVT::i8));
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}
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return SDValue();
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}
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SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const {
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SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const {
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFunction &MF = DAG.getMachineFunction();
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@ -4266,8 +4278,14 @@ X86TargetLowering::LowerVECTOR_SHUFFLEv8i16(SDValue Op,
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// If we've eliminated the use of V2, and the new mask is a pshuflw or
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// If we've eliminated the use of V2, and the new mask is a pshuflw or
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// pshufhw, that's as cheap as it gets. Return the new shuffle.
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// pshufhw, that's as cheap as it gets. Return the new shuffle.
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if ((pshufhw && InOrder[0]) || (pshuflw && InOrder[1])) {
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if ((pshufhw && InOrder[0]) || (pshuflw && InOrder[1])) {
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return DAG.getVectorShuffle(MVT::v8i16, dl, NewV,
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unsigned Opc = pshufhw ? X86ISD::PSHUFHW : X86ISD::PSHUFLW;
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unsigned TargetMask = 0;
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NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV,
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DAG.getUNDEF(MVT::v8i16), &MaskVals[0]);
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DAG.getUNDEF(MVT::v8i16), &MaskVals[0]);
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TargetMask = pshufhw ? X86::getShufflePSHUFHWImmediate(NewV.getNode()):
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X86::getShufflePSHUFLWImmediate(NewV.getNode());
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V1 = NewV.getOperand(0);
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return getTargetShuffleNode(Opc, dl, MVT::v8i16, V1, V1, TargetMask, DAG);
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}
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}
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}
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}
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