RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 11:42:57 +01:00
Code Issues Projects Releases Wiki Activity

[mips] Add predicate HasFPIdx for floating-point indexed load instruction

Browse Source 
support and use it in place of HasMips32r2Or64.

llvm-svn: 168089
This commit is contained in:
Akira Hatanaka 2012-11-15 21:17:13 +00:00
parent bbed73e7c4
commit ee3532f807
6 changed files with 16 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
lib/Target/Mips/Mips.td
View File

@ -60,16 +60,19 @@ def FeatureSwap : SubtargetFeature<"swap", "HasSwap", "true",
"Enable 'byte/half swap' instructions.">;
def FeatureBitCount : SubtargetFeature<"bitcount", "HasBitCount", "true",
"Enable 'count leading bits' instructions.">;
def FeatureFPIdx : SubtargetFeature<"FPIdx", "HasFPIdx", "true",
"Enable 'FP indexed load/store' instructions.">;
def FeatureMips32 : SubtargetFeature<"mips32", "MipsArchVersion", "Mips32",
"Mips32 ISA Support",
[FeatureCondMov, FeatureBitCount]>;
def FeatureMips32r2 : SubtargetFeature<"mips32r2", "MipsArchVersion",
"Mips32r2", "Mips32r2 ISA Support",
[FeatureMips32, FeatureSEInReg, FeatureSwap]>;
[FeatureMips32, FeatureSEInReg, FeatureSwap,
FeatureFPIdx]>;
def FeatureMips64 : SubtargetFeature<"mips64", "MipsArchVersion",
"Mips64", "Mips64 ISA Support",
[FeatureGP64Bit, FeatureFP64Bit,
FeatureMips32]>;
FeatureMips32, FeatureFPIdx]>;
def FeatureMips64r2 : SubtargetFeature<"mips64r2", "MipsArchVersion",
"Mips64r2", "Mips64r2 ISA Support",
[FeatureMips64, FeatureMips32r2]>;

4
lib/Target/Mips/MipsISelDAGToDAG.cpp
View File

@ -390,7 +390,7 @@ SelectAddr(SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset) {
if (LS &&
(LS->getMemoryVT() == MVT::f32 || LS->getMemoryVT() == MVT::f64) &&
Subtarget.hasMips32r2Or64())
Subtarget.hasFPIdx())
return false;
}
@ -500,7 +500,7 @@ bool MipsDAGToDAGISel::SelectAddr16(
if (LS &&
(LS->getMemoryVT() == MVT::f32 || LS->getMemoryVT() == MVT::f64) &&
Subtarget.hasMips32r2Or64())
Subtarget.hasFPIdx())
return false;
}
Base = Addr;

2
lib/Target/Mips/MipsInstrFPU.td
View File

@ -282,7 +282,7 @@ let Predicates = [NotN64, NotMips64, HasStandardEncoding] in {
}
// Indexed loads and stores.
let Predicates = [HasMips32r2Or64, HasStandardEncoding] in {
let Predicates = [HasFPIdx, HasStandardEncoding] in {
def LWXC1 : FPIdxLoad<0x0, "lwxc1", FGR32, CPURegs, load>;
def SWXC1 : FPIdxStore<0x8, "swxc1", FGR32, CPURegs, store>;
}

4
lib/Target/Mips/MipsInstrInfo.td
View File

@ -148,14 +148,14 @@ def HasSwap : Predicate<"Subtarget.hasSwap()">,
AssemblerPredicate<"FeatureSwap">;
def HasCondMov : Predicate<"Subtarget.hasCondMov()">,
AssemblerPredicate<"FeatureCondMov">;
def HasFPIdx : Predicate<"Subtarget.hasFPIdx()">,
AssemblerPredicate<"FeatureFPIdx">;
def HasMips32 : Predicate<"Subtarget.hasMips32()">,
AssemblerPredicate<"FeatureMips32">;
def HasMips32r2 : Predicate<"Subtarget.hasMips32r2()">,
AssemblerPredicate<"FeatureMips32r2">;
def HasMips64 : Predicate<"Subtarget.hasMips64()">,
AssemblerPredicate<"FeatureMips64">;
def HasMips32r2Or64 : Predicate<"Subtarget.hasMips32r2Or64()">,
AssemblerPredicate<"FeatureMips32r2,FeatureMips64">;
def NotMips64 : Predicate<"!Subtarget.hasMips64()">,
AssemblerPredicate<"!FeatureMips64">;
def HasMips64r2 : Predicate<"Subtarget.hasMips64r2()">,

4
lib/Target/Mips/MipsSubtarget.cpp
View File

@ -31,8 +31,8 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false),
HasMinMax(false), HasSwap(false), HasBitCount(false), InMips16Mode(false),
HasDSP(false), HasDSPR2(false), IsAndroid(false)
HasMinMax(false), HasSwap(false), HasBitCount(false), HasFPIdx(false),
InMips16Mode(false), HasDSP(false), HasDSPR2(false), IsAndroid(false)
{
std::string CPUName = CPU;
if (CPUName.empty())

6
lib/Target/Mips/MipsSubtarget.h
View File

@ -89,6 +89,9 @@ protected:
// HasBitCount - Count leading '1' and '0' bits.
bool HasBitCount;
// HasFPIdx -- Floating point indexed load/store instructions.
bool HasFPIdx;
// InMips16 -- can process Mips16 instructions
bool InMips16Mode;
@ -127,8 +130,6 @@ public:
bool hasMips64() const { return MipsArchVersion >= Mips64; }
bool hasMips64r2() const { return MipsArchVersion == Mips64r2; }
bool hasMips32r2Or64() const { return hasMips32r2() || hasMips64(); }
bool isLittle() const { return IsLittle; }
bool isFP64bit() const { return IsFP64bit; }
bool isGP64bit() const { return IsGP64bit; }
@ -152,6 +153,7 @@ public:
bool hasMinMax() const { return HasMinMax; }
bool hasSwap() const { return HasSwap; }
bool hasBitCount() const { return HasBitCount; }
bool hasFPIdx() const { return HasFPIdx; }
};
} // End llvm namespace