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[AArch64InstrInfo] Ignore debug insts in areCFlagsAccessedBetweenInstrs [7/14]
Summary: Fix an issue where the presence of debug info could disable a peephole optimization due to areCFlagsAccessedBetweenInstrs returning the wrong result. In test/CodeGen/AArch64/arm64-csel.ll, the issue was found in the function @foo5, in which the first compare could successfully be optimized but not the second. Reviewers: t.p.northover, eastig, paquette Subscribers: kristof.beyls, hiraditya, danielkiss, aprantl, dsanders, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D78157
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@ -616,6 +616,7 @@ bool PeepholeOptimizer::optimizeCmpInstr(MachineInstr &MI) {
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// Attempt to optimize the comparison instruction.
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LLVM_DEBUG(dbgs() << "Attempting to optimize compare: " << MI);
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if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) {
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LLVM_DEBUG(dbgs() << " -> Successfully optimized compare!\n");
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++NumCmps;
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return true;
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}
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@ -1183,10 +1183,9 @@ static bool areCFlagsAccessedBetweenInstrs(
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return MI.getIterator() == From;
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}) != To->getParent()->rend());
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// We iterate backward starting \p To until we hit \p From.
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for (--To; To != From; --To) {
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const MachineInstr &Instr = *To;
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// We iterate backward starting at \p To until we hit \p From.
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for (const MachineInstr &Instr :
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reversedInstructionsWithoutDebug(std::prev(To), From)) {
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if (((AccessToCheck & AK_Write) &&
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Instr.modifiesRegister(AArch64::NZCV, TRI)) ||
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((AccessToCheck & AK_Read) && Instr.readsRegister(AArch64::NZCV, TRI)))
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@ -1,4 +1,4 @@
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; RUN: llc -O3 < %s | FileCheck %s
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; RUN: llc -debugify-and-strip-all-safe -O3 < %s | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64"
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target triple = "arm64-unknown-unknown"
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