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X86.td: Refactor to bring operands that use print_pcrel_imm together.
llvm-svn: 94861
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@ -182,10 +182,6 @@ def X86mul_imm : SDNode<"X86ISD::MUL_IMM", SDTIntBinOp>;
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// X86 Operand Definitions.
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//
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def i32imm_pcrel : Operand<i32> {
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let PrintMethod = "print_pcrel_imm";
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}
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// A version of ptr_rc which excludes SP, ESP, and RSP. This is used for
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// the index operand of an address, to conform to x86 encoding restrictions.
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def ptr_rc_nosp : PointerLikeRegClass<1>;
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@ -211,11 +207,6 @@ def opaque48mem : X86MemOperand<"printopaquemem">;
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def opaque80mem : X86MemOperand<"printopaquemem">;
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def opaque512mem : X86MemOperand<"printopaquemem">;
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def offset8 : Operand<i64> { let PrintMethod = "print_pcrel_imm"; }
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def offset16 : Operand<i64> { let PrintMethod = "print_pcrel_imm"; }
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def offset32 : Operand<i64> { let PrintMethod = "print_pcrel_imm"; }
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def offset64 : Operand<i64> { let PrintMethod = "print_pcrel_imm"; }
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def i8mem : X86MemOperand<"printi8mem">;
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def i16mem : X86MemOperand<"printi16mem">;
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def i32mem : X86MemOperand<"printi32mem">;
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@ -242,6 +233,20 @@ def lea32mem : Operand<i32> {
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let ParserMatchClass = X86NoSegMemAsmOperand;
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}
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let PrintMethod = "print_pcrel_imm" in {
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def i32imm_pcrel : Operand<i32>;
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def offset8 : Operand<i64>;
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def offset16 : Operand<i64>;
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def offset32 : Operand<i64>;
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def offset64 : Operand<i64>;
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// Branch targets have OtherVT type and print as pc-relative values.
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def brtarget : Operand<OtherVT>;
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def brtarget8 : Operand<OtherVT>;
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}
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def SSECC : Operand<i8> {
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let PrintMethod = "printSSECC";
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}
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@ -261,15 +266,6 @@ def i32i8imm : Operand<i32> {
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let ParserMatchClass = ImmSExt8AsmOperand;
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}
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// Branch targets have OtherVT type and print as pc-relative values.
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def brtarget : Operand<OtherVT> {
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let PrintMethod = "print_pcrel_imm";
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}
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def brtarget8 : Operand<OtherVT> {
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let PrintMethod = "print_pcrel_imm";
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}
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//===----------------------------------------------------------------------===//
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// X86 Complex Pattern Definitions.
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//
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