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Add initial support for IF-conversion. This patch implements the first 1/3,
which is the legality of the if-conversion transformation. The next step is to implement the cost-model for the if-converted code as well as the vectorization itself. llvm-svn: 169152
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@ -80,6 +80,10 @@ static cl::opt<unsigned>
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VectorizationFactor("force-vector-width", cl::init(0), cl::Hidden,
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cl::desc("Set the default vectorization width. Zero is autoselect."));
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static cl::opt<bool>
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EnableIfConversion("enable-if-conversion", cl::init(false), cl::Hidden,
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cl::desc("Enable if-conversion during vectorization."));
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/// We don't vectorize loops with a known constant trip count below this number.
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const unsigned TinyTripCountThreshold = 16;
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@ -219,16 +223,17 @@ private:
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/// * Memory checks - The code in canVectorizeMemory checks if vectorization
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/// will change the order of memory accesses in a way that will change the
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/// correctness of the program.
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/// * Scalars checks - The code in canVectorizeBlock checks for a number
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/// of different conditions, such as the availability of a single induction
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/// variable, that all types are supported and vectorize-able, etc.
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/// This code reflects the capabilities of SingleBlockLoopVectorizer.
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/// * Scalars checks - The code in canVectorizeInstrs and canVectorizeMemory
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/// checks for a number of different conditions, such as the availability of a
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/// single induction variable, that all types are supported and vectorize-able,
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/// etc. This code reflects the capabilities of SingleBlockLoopVectorizer.
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/// This class is also used by SingleBlockLoopVectorizer for identifying
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/// induction variable and the different reduction variables.
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class LoopVectorizationLegality {
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public:
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LoopVectorizationLegality(Loop *Lp, ScalarEvolution *Se, DataLayout *Dl):
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TheLoop(Lp), SE(Se), DL(Dl), Induction(0) { }
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LoopVectorizationLegality(Loop *Lp, ScalarEvolution *Se, DataLayout *Dl,
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DominatorTree *Dt):
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TheLoop(Lp), SE(Se), DL(Dl), DT(Dt), Induction(0) { }
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/// This represents the kinds of reductions that we support.
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enum ReductionKind {
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@ -277,7 +282,7 @@ public:
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const SCEV *Sc = SE->getSCEV(Ptr);
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const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Sc);
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assert(AR && "Invalid addrec expression");
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const SCEV *Ex = SE->getExitCount(Lp, Lp->getHeader());
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const SCEV *Ex = SE->getExitCount(Lp, Lp->getLoopLatch());
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const SCEV *ScEnd = AR->evaluateAtIteration(Ex, *SE);
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Pointers.push_back(Ptr);
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Starts.push_back(AR->getStart());
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@ -334,13 +339,28 @@ private:
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/// Check if a single basic block loop is vectorizable.
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/// At this point we know that this is a loop with a constant trip count
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/// and we only need to check individual instructions.
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bool canVectorizeBlock(BasicBlock &BB);
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bool canVectorizeInstrs(BasicBlock &BB);
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/// When we vectorize loops we may change the order in which
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/// we read and write from memory. This method checks if it is
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/// legal to vectorize the code, considering only memory constrains.
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/// Returns true if BB is vectorizable
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bool canVectorizeMemory(BasicBlock &BB);
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bool canVectorizeMemory();
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/// Return true if we can vectorize this loop using the IF-conversion
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/// transformation.
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bool canVectorizeWithIfConvert();
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/// Collect the variables that need to stay uniform after vectorization.
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void collectLoopUniforms();
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/// Return true if the block BB needs to be predicated in order for the loop
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/// to be vectorized.
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bool blockNeedsPredication(BasicBlock *BB);
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/// return true if all of the instructions in the block can be speculatively
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/// executed.
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bool blockCanBePredicated(BasicBlock *BB);
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/// Returns True, if 'Phi' is the kind of reduction variable for type
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/// 'Kind'. If this is a reduction variable, it adds it to ReductionList.
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@ -359,6 +379,8 @@ private:
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ScalarEvolution *SE;
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/// DataLayout analysis.
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DataLayout *DL;
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// Dominators.
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DominatorTree *DT;
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// --- vectorization state --- //
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@ -458,7 +480,7 @@ struct LoopVectorize : public LoopPass {
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L->getHeader()->getParent()->getName() << "\"\n");
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// Check if it is legal to vectorize the loop.
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LoopVectorizationLegality LVL(L, SE, DL);
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LoopVectorizationLegality LVL(L, SE, DL, DT);
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if (!LVL.canVectorize()) {
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DEBUG(dbgs() << "LV: Not vectorizing.\n");
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return false;
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@ -1423,41 +1445,91 @@ void SingleBlockLoopVectorizer::updateAnalysis() {
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DEBUG(DT->verifyAnalysis());
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}
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bool LoopVectorizationLegality::canVectorizeWithIfConvert() {
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if (!EnableIfConversion)
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return false;
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assert(TheLoop->getNumBlocks() > 1 && "Single block loops are vectorizable");
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std::vector<BasicBlock*> &LoopBlocks = TheLoop->getBlocksVector();
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// Collect the blocks that need predication.
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for (unsigned i = 0, e = LoopBlocks.size(); i < e; ++i) {
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BasicBlock *BB = LoopBlocks[i];
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// We must have at most two predecessors because we need to convert
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// all PHIs to selects.
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unsigned Preds = std::distance(pred_begin(BB), pred_end(BB));
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if (Preds > 2)
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return false;
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// We must be able to predicate all blocks that needs to be predicated.
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if (blockNeedsPredication(BB) && !blockCanBePredicated(BB))
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return false;
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}
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// We can if-convert this loop.
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return true;
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}
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bool LoopVectorizationLegality::canVectorize() {
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assert(TheLoop->getLoopPreheader() && "No preheader!!");
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// We can only vectorize single basic block loops.
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// We can only vectorize innermost loops.
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if (TheLoop->getSubLoopsVector().size())
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return false;
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// We must have a single backedge.
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if (TheLoop->getNumBackEdges() != 1)
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return false;
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// We must have a single exiting block.
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if (!TheLoop->getExitingBlock())
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return false;
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unsigned NumBlocks = TheLoop->getNumBlocks();
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if (NumBlocks != 1) {
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DEBUG(dbgs() << "LV: Too many blocks:" << NumBlocks << "\n");
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// Check if we can if-convert non single-bb loops.
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if (NumBlocks != 1 && !canVectorizeWithIfConvert()) {
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DEBUG(dbgs() << "LV: Can't if-convert the loop.\n");
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return false;
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}
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// We need to have a loop header.
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BasicBlock *BB = TheLoop->getHeader();
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DEBUG(dbgs() << "LV: Found a loop: " << BB->getName() << "\n");
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BasicBlock *Header = TheLoop->getHeader();
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BasicBlock *Latch = TheLoop->getLoopLatch();
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DEBUG(dbgs() << "LV: Found a loop: " << Header->getName() << "\n");
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// ScalarEvolution needs to be able to find the exit count.
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const SCEV *ExitCount = SE->getExitCount(TheLoop, BB);
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const SCEV *ExitCount = SE->getExitCount(TheLoop, Latch);
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if (ExitCount == SE->getCouldNotCompute()) {
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DEBUG(dbgs() << "LV: SCEV could not compute the loop exit count.\n");
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return false;
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}
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// Do not loop-vectorize loops with a tiny trip count.
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unsigned TC = SE->getSmallConstantTripCount(TheLoop, BB);
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unsigned TC = SE->getSmallConstantTripCount(TheLoop, Latch);
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if (TC > 0u && TC < TinyTripCountThreshold) {
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DEBUG(dbgs() << "LV: Found a loop with a very small trip count. " <<
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"This loop is not worth vectorizing.\n");
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return false;
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}
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// Go over each instruction and look at memory deps.
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if (!canVectorizeBlock(*BB)) {
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DEBUG(dbgs() << "LV: Can't vectorize this loop header\n");
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// Check if we can vectorize the instructions and CFG in this loop.
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if (!canVectorizeInstrs(*Header)) {
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DEBUG(dbgs() << "LV: Can't vectorize the instructions or CFG\n");
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return false;
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}
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// Go over each instruction and look at memory deps.
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if (!canVectorizeMemory()) {
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DEBUG(dbgs() << "LV: Can't vectorize due to memory conflicts\n");
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return false;
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}
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// Collect all of the variables that remain uniform after vectorization.
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collectLoopUniforms();
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DEBUG(dbgs() << "LV: We can vectorize this loop" <<
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(PtrRtCheck.Need ? " (with a runtime bound check)" : "")
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<<"!\n");
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@ -1468,9 +1540,13 @@ bool LoopVectorizationLegality::canVectorize() {
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return true;
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}
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bool LoopVectorizationLegality::canVectorizeBlock(BasicBlock &BB) {
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bool LoopVectorizationLegality::canVectorizeInstrs(BasicBlock &BB) {
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BasicBlock *PreHeader = TheLoop->getLoopPreheader();
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BasicBlock *Header = TheLoop->getHeader();
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// For each block in the loop
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for (Loop::block_iterator bb = TheLoop->block_begin(),
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be = TheLoop->block_end(); bb != be; ++bb) {
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// Scan the instructions in the block and look for hazards.
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for (BasicBlock::iterator it = BB.begin(), e = BB.end(); it != e; ++it) {
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@ -1483,6 +1559,12 @@ bool LoopVectorizationLegality::canVectorizeBlock(BasicBlock &BB) {
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return false;
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}
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// If this PHINode is not in the header block, then we know that we
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// can convert it to select during if-conversion.
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if (*bb != Header) {
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continue;
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}
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// This is the value coming from the preheader.
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Value *StartValue = Phi->getIncomingValueForBlock(PreHeader);
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@ -1554,36 +1636,42 @@ bool LoopVectorizationLegality::canVectorizeBlock(BasicBlock &BB) {
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it != e; ++it) {
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Instruction *U = cast<Instruction>(*it);
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// This user may be a reduction exit value.
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BasicBlock *Parent = U->getParent();
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if (Parent != &BB) {
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if (!TheLoop->contains(U)) {
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DEBUG(dbgs() << "LV: Found an outside user for : "<< *U << "\n");
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return false;
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}
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}
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} // next instr.
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}
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if (!Induction) {
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DEBUG(dbgs() << "LV: Did not find one integer induction var.\n");
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assert(getInductionVars()->size() && "No induction variables");
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}
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// Don't vectorize if the memory dependencies do not allow vectorization.
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if (!canVectorizeMemory(BB))
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return false;
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return true;
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}
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void LoopVectorizationLegality::collectLoopUniforms() {
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// We now know that the loop is vectorizable!
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// Collect variables that will remain uniform after vectorization.
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std::vector<Value*> Worklist;
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BasicBlock *Latch = TheLoop->getLoopLatch();
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// Start with the conditional branch and walk up the block.
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Worklist.push_back(BB.getTerminator()->getOperand(0));
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Worklist.push_back(Latch->getTerminator()->getOperand(0));
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while (Worklist.size()) {
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Instruction *I = dyn_cast<Instruction>(Worklist.back());
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Worklist.pop_back();
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// Look at instructions inside this block. Stop when reaching PHI nodes.
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if (!I || I->getParent() != &BB || isa<PHINode>(I))
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// Look at instructions inside this loop.
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// Stop when reaching PHI nodes.
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// TODO: we need to prevent loops but we do need to follow PHIs inside this
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// loop.
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if (!I || !TheLoop->contains(I) || isa<PHINode>(I))
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continue;
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// This is a known uniform.
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@ -1594,11 +1682,9 @@ bool LoopVectorizationLegality::canVectorizeBlock(BasicBlock &BB) {
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Worklist.push_back(I->getOperand(i));
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}
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}
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return true;
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}
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bool LoopVectorizationLegality::canVectorizeMemory(BasicBlock &BB) {
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bool LoopVectorizationLegality::canVectorizeMemory() {
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typedef SmallVector<Value*, 16> ValueVector;
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typedef SmallPtrSet<Value*, 16> ValueSet;
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// Holds the Load and Store *instructions*.
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@ -1607,15 +1693,19 @@ bool LoopVectorizationLegality::canVectorizeMemory(BasicBlock &BB) {
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PtrRtCheck.Pointers.clear();
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PtrRtCheck.Need = false;
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// For each block.
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for (Loop::block_iterator bb = TheLoop->block_begin(),
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be = TheLoop->block_end(); bb != be; ++bb) {
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// Scan the BB and collect legal loads and stores.
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for (BasicBlock::iterator it = BB.begin(), e = BB.end(); it != e; ++it) {
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Instruction *I = it;
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for (BasicBlock::iterator it = (*bb)->begin(), e = (*bb)->end(); it != e;
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++it) {
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// If this is a load, save it. If this instruction can read from memory
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// but is not a load, then we quit. Notice that we don't handle function
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// calls that read or write.
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if (I->mayReadFromMemory()) {
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LoadInst *Ld = dyn_cast<LoadInst>(I);
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if (it->mayReadFromMemory()) {
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LoadInst *Ld = dyn_cast<LoadInst>(it);
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if (!Ld) return false;
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if (!Ld->isSimple()) {
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DEBUG(dbgs() << "LV: Found a non-simple load.\n");
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@ -1625,9 +1715,9 @@ bool LoopVectorizationLegality::canVectorizeMemory(BasicBlock &BB) {
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continue;
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}
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// Save store instructions. Abort if other instructions write to memory.
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if (I->mayWriteToMemory()) {
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StoreInst *St = dyn_cast<StoreInst>(I);
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// Save 'store' instructions. Abort if other instructions write to memory.
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if (it->mayWriteToMemory()) {
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StoreInst *St = dyn_cast<StoreInst>(it);
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if (!St) return false;
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if (!St->isSimple()) {
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DEBUG(dbgs() << "LV: Found a non-simple store.\n");
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@ -1636,6 +1726,7 @@ bool LoopVectorizationLegality::canVectorizeMemory(BasicBlock &BB) {
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Stores.push_back(St);
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}
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} // next instr.
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} // next block.
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// Now we have two lists that hold the loads and the stores.
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// Next, we find the pointers that they use.
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@ -1908,6 +1999,34 @@ bool LoopVectorizationLegality::isInductionVariable(PHINode *Phi) {
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return (C->getValue()->equalsInt(Size));
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}
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bool LoopVectorizationLegality::blockNeedsPredication(BasicBlock *BB) {
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assert(TheLoop->contains(BB) && "Unknown block used");
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// Blocks that do not dominate the latch need predication.
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BasicBlock* Latch = TheLoop->getLoopLatch();
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return !DT->dominates(BB, Latch);
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}
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bool LoopVectorizationLegality::blockCanBePredicated(BasicBlock *BB) {
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for (BasicBlock::iterator it = BB->begin(), e = BB->end(); it != e; ++it) {
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// We don't predicate loads/stores at the moment.
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if (it->mayReadFromMemory() || it->mayWriteToMemory() || it->mayThrow())
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return false;
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// The isntructions below can trap.
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switch (it->getOpcode()) {
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default: continue;
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case Instruction::UDiv:
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case Instruction::SDiv:
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case Instruction::URem:
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case Instruction::SRem:
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return false;
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}
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}
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return true;
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}
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bool LoopVectorizationLegality::hasComputableBounds(Value *Ptr) {
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const SCEV *PhiScev = SE->getSCEV(Ptr);
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const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(PhiScev);
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