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[X86] Rename imm8_su/imm16_su/imm32_su to relocImm8_su/relocImm16_su/relocImm32_su/ to accurately reflect what they are.

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llvm-svn: 356393
This commit is contained in:
Craig Topper 2019-03-18 18:54:06 +00:00
parent d2b89688b2
commit eea5cb8a32
2 changed files with 9 additions and 9 deletions
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6
lib/Target/X86/X86InstrArithmetic.td
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@ -602,13 +602,13 @@ def invalid_node : SDNode<"<<invalid_node>>", SDTIntLeaf,[],"<<invalid_node>>">;
def Xi8 : X86TypeInfo<i8, "b", GR8, loadi8, i8mem, def Xi8 : X86TypeInfo<i8, "b", GR8, loadi8, i8mem,
Imm8, i8imm, imm8_su, i8imm, invalid_node, Imm8, i8imm, relocImm8_su, i8imm, invalid_node,
0, OpSizeFixed, 0>; 0, OpSizeFixed, 0>;
def Xi16 : X86TypeInfo<i16, "w", GR16, loadi16, i16mem, def Xi16 : X86TypeInfo<i16, "w", GR16, loadi16, i16mem,
Imm16, i16imm, imm16_su, i16i8imm, i16immSExt8_su, Imm16, i16imm, relocImm16_su, i16i8imm, i16immSExt8_su,
1, OpSize16, 0>; 1, OpSize16, 0>;
def Xi32 : X86TypeInfo<i32, "l", GR32, loadi32, i32mem, def Xi32 : X86TypeInfo<i32, "l", GR32, loadi32, i32mem,
Imm32, i32imm, imm32_su, i32i8imm, i32immSExt8_su, Imm32, i32imm, relocImm32_su, i32i8imm, i32immSExt8_su,
1, OpSize32, 0>; 1, OpSize32, 0>;
def Xi64 : X86TypeInfo<i64, "q", GR64, loadi64, i64mem, def Xi64 : X86TypeInfo<i64, "q", GR64, loadi64, i64mem,
Imm32S, i64i32imm, i64immSExt32_su, i64i8imm, i64immSExt8_su, Imm32S, i64i32imm, i64immSExt32_su, i64i8imm, i64immSExt8_su,

12
lib/Target/X86/X86InstrInfo.td
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@ -984,13 +984,13 @@ def i64relocImmSExt32 : PatLeaf<(i64 relocImm), [{
// Eventually, it would be nice to allow ConstantHoisting to merge constants // Eventually, it would be nice to allow ConstantHoisting to merge constants
// globally for potentially added savings. // globally for potentially added savings.
// //
def imm8_su : PatLeaf<(i8 relocImm), [{ def relocImm8_su : PatLeaf<(i8 relocImm), [{
return !shouldAvoidImmediateInstFormsForSize(N); return !shouldAvoidImmediateInstFormsForSize(N);
}]>; }]>;
def imm16_su : PatLeaf<(i16 relocImm), [{ def relocImm16_su : PatLeaf<(i16 relocImm), [{
return !shouldAvoidImmediateInstFormsForSize(N); return !shouldAvoidImmediateInstFormsForSize(N);
}]>; }]>;
def imm32_su : PatLeaf<(i32 relocImm), [{ def relocImm32_su : PatLeaf<(i32 relocImm), [{
return !shouldAvoidImmediateInstFormsForSize(N); return !shouldAvoidImmediateInstFormsForSize(N);
}]>; }]>;
def i64immSExt32_su : PatLeaf<(i64immSExt32), [{ def i64immSExt32_su : PatLeaf<(i64immSExt32), [{
@ -1494,13 +1494,13 @@ def MOV32ri_alt : Ii32<0xC7, MRM0r, (outs GR32:$dst), (ins i32imm:$src),
let SchedRW = [WriteStore] in { let SchedRW = [WriteStore] in {
def MOV8mi : Ii8 <0xC6, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src), def MOV8mi : Ii8 <0xC6, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src),
"mov{b}\t{$src, $dst|$dst, $src}", "mov{b}\t{$src, $dst|$dst, $src}",
[(store (i8 imm8_su:$src), addr:$dst)]>; [(store (i8 relocImm8_su:$src), addr:$dst)]>;
def MOV16mi : Ii16<0xC7, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src), def MOV16mi : Ii16<0xC7, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src),
"mov{w}\t{$src, $dst|$dst, $src}", "mov{w}\t{$src, $dst|$dst, $src}",
[(store (i16 imm16_su:$src), addr:$dst)]>, OpSize16; [(store (i16 relocImm16_su:$src), addr:$dst)]>, OpSize16;
def MOV32mi : Ii32<0xC7, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src), def MOV32mi : Ii32<0xC7, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src),
"mov{l}\t{$src, $dst|$dst, $src}", "mov{l}\t{$src, $dst|$dst, $src}",
[(store (i32 imm32_su:$src), addr:$dst)]>, OpSize32; [(store (i32 relocImm32_su:$src), addr:$dst)]>, OpSize32;
def MOV64mi32 : RIi32S<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src), def MOV64mi32 : RIi32S<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src),
"mov{q}\t{$src, $dst|$dst, $src}", "mov{q}\t{$src, $dst|$dst, $src}",
[(store i64immSExt32_su:$src, addr:$dst)]>, [(store i64immSExt32_su:$src, addr:$dst)]>,