From eee649c09f2f02cfab330d231338d303f1940fba Mon Sep 17 00:00:00 2001 From: Hiroshi Inoue Date: Thu, 12 Apr 2018 05:53:20 +0000 Subject: [PATCH] [NFC] fix trivial typos in documents and comments "is is" -> "is", "if if" -> "if", "or or" -> "or" llvm-svn: 329878 --- docs/AMDGPUUsage.rst | 2 +- docs/ExceptionHandling.rst | 2 +- docs/ProgrammersManual.rst | 2 +- include/llvm/Analysis/LoopInfo.h | 2 +- include/llvm/Analysis/ScalarEvolutionExpander.h | 2 +- lib/CodeGen/LiveIntervals.cpp | 2 +- lib/IR/ConstantFold.cpp | 2 +- lib/Object/COFFObjectFile.cpp | 2 +- lib/Transforms/Scalar/NewGVN.cpp | 2 +- test/CodeGen/AArch64/bitfield-insert.ll | 2 +- test/Transforms/GVNHoist/infinite-loop-indirect.ll | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) diff --git a/docs/AMDGPUUsage.rst b/docs/AMDGPUUsage.rst index c07df6772c6..d6255c8a15e 100644 --- a/docs/AMDGPUUsage.rst +++ b/docs/AMDGPUUsage.rst @@ -2269,7 +2269,7 @@ VGPR register initial state is defined in > 1) wavefront lane. ========== ========================== ====== ============================== -The setting of registers is is done by GPU CP/ADC/SPI hardware as follows: +The setting of registers is done by GPU CP/ADC/SPI hardware as follows: 1. SGPRs before the Work-Group Ids are set by CP using the 16 User Data registers. diff --git a/docs/ExceptionHandling.rst b/docs/ExceptionHandling.rst index e65c1bede04..18ff53cd3b6 100644 --- a/docs/ExceptionHandling.rst +++ b/docs/ExceptionHandling.rst @@ -365,7 +365,7 @@ abstract interface. When used in the native Windows C++ exception handling implementation, this intrinsic serves as a placeholder to delimit code before a catch handler is -outlined. When the handler is is outlined, this intrinsic will be replaced +outlined. When the handler is outlined, this intrinsic will be replaced by instructions that retrieve the exception object pointer from the frame allocation block. diff --git a/docs/ProgrammersManual.rst b/docs/ProgrammersManual.rst index 07048a52319..5e510fb7e7b 100644 --- a/docs/ProgrammersManual.rst +++ b/docs/ProgrammersManual.rst @@ -2984,7 +2984,7 @@ Conceptually, ``LLVMContext`` provides isolation. Every LLVM entity in-memory IR belongs to an ``LLVMContext``. Entities in different contexts *cannot* interact with each other: ``Module``\ s in different contexts cannot be linked together, ``Function``\ s cannot be added to ``Module``\ s in different -contexts, etc. What this means is that is is safe to compile on multiple +contexts, etc. What this means is that is safe to compile on multiple threads simultaneously, as long as no two threads operate on entities within the same context. diff --git a/include/llvm/Analysis/LoopInfo.h b/include/llvm/Analysis/LoopInfo.h index 28afc39727f..49f40f70188 100644 --- a/include/llvm/Analysis/LoopInfo.h +++ b/include/llvm/Analysis/LoopInfo.h @@ -527,7 +527,7 @@ public: /// /// If this loop contains the same llvm.loop metadata on each branch to the /// header then the node is returned. If any latch instruction does not - /// contain llvm.loop or or if multiple latches contain different nodes then + /// contain llvm.loop or if multiple latches contain different nodes then /// 0 is returned. MDNode *getLoopID() const; /// Set the llvm.loop loop id metadata for this loop. diff --git a/include/llvm/Analysis/ScalarEvolutionExpander.h b/include/llvm/Analysis/ScalarEvolutionExpander.h index 3df04e98bd2..6476568695c 100644 --- a/include/llvm/Analysis/ScalarEvolutionExpander.h +++ b/include/llvm/Analysis/ScalarEvolutionExpander.h @@ -321,7 +321,7 @@ namespace llvm { /// Arrange for there to be a cast of V to Ty at IP, reusing an existing /// cast if a suitable one exists, moving an existing cast if a suitable one - /// exists but isn't in the right place, or or creating a new one. + /// exists but isn't in the right place, or creating a new one. Value *ReuseOrCreateCast(Value *V, Type *Ty, Instruction::CastOps Op, BasicBlock::iterator IP); diff --git a/lib/CodeGen/LiveIntervals.cpp b/lib/CodeGen/LiveIntervals.cpp index 13fe77e4866..c10881b5d19 100644 --- a/lib/CodeGen/LiveIntervals.cpp +++ b/lib/CodeGen/LiveIntervals.cpp @@ -785,7 +785,7 @@ MachineBasicBlock* LiveIntervals::intervalIsInOneMBB(const LiveInterval &LI) const { // A local live range must be fully contained inside the block, meaning it is // defined and killed at instructions, not at block boundaries. It is not - // live in or or out of any block. + // live in or out of any block. // // It is technically possible to have a PHI-defined live range identical to a // single block, but we are going to return false in that case. diff --git a/lib/IR/ConstantFold.cpp b/lib/IR/ConstantFold.cpp index 7ad2d46bfb6..3859dfbbd3f 100644 --- a/lib/IR/ConstantFold.cpp +++ b/lib/IR/ConstantFold.cpp @@ -321,7 +321,7 @@ static Constant *ExtractConstantBytes(Constant *C, unsigned ByteStart, if (ByteStart == 0 && ByteSize*8 == SrcBitSize) return CE->getOperand(0); - // If extracting something completely in the input, if if the input is a + // If extracting something completely in the input, if the input is a // multiple of 8 bits, recurse. if ((SrcBitSize&7) == 0 && (ByteStart+ByteSize)*8 <= SrcBitSize) return ExtractConstantBytes(CE->getOperand(0), ByteStart, ByteSize); diff --git a/lib/Object/COFFObjectFile.cpp b/lib/Object/COFFObjectFile.cpp index b544fa5c147..e45246b5776 100644 --- a/lib/Object/COFFObjectFile.cpp +++ b/lib/Object/COFFObjectFile.cpp @@ -944,7 +944,7 @@ COFFObjectFile::getPE32PlusHeader(const pe32plus_header *&Res) const { std::error_code COFFObjectFile::getDataDirectory(uint32_t Index, const data_directory *&Res) const { - // Error if if there's no data directory or the index is out of range. + // Error if there's no data directory or the index is out of range. if (!DataDirectory) { Res = nullptr; return object_error::parse_failed; diff --git a/lib/Transforms/Scalar/NewGVN.cpp b/lib/Transforms/Scalar/NewGVN.cpp index ec1985c8292..892bc7ffcee 100644 --- a/lib/Transforms/Scalar/NewGVN.cpp +++ b/lib/Transforms/Scalar/NewGVN.cpp @@ -1705,7 +1705,7 @@ bool NewGVN::isCycleFree(const Instruction *I) const { if (ICS == ICS_Unknown) { SCCFinder.Start(I); auto &SCC = SCCFinder.getComponentFor(I); - // It's cycle free if it's size 1 or or the SCC is *only* phi nodes. + // It's cycle free if it's size 1 or the SCC is *only* phi nodes. if (SCC.size() == 1) InstCycleState.insert({I, ICS_CycleFree}); else { diff --git a/test/CodeGen/AArch64/bitfield-insert.ll b/test/CodeGen/AArch64/bitfield-insert.ll index d5319ca1f95..3f5841c52fd 100644 --- a/test/CodeGen/AArch64/bitfield-insert.ll +++ b/test/CodeGen/AArch64/bitfield-insert.ll @@ -137,7 +137,7 @@ define void @test_32bit_complexmask(i32 *%existing, i32 *%new) { ret void } -; Neither mask is is a contiguous set of 1s. BFI can't be used +; Neither mask is a contiguous set of 1s. BFI can't be used define void @test_32bit_badmask(i32 *%existing, i32 *%new) { ; CHECK-LABEL: test_32bit_badmask: ; CHECK-NOT: bfi diff --git a/test/Transforms/GVNHoist/infinite-loop-indirect.ll b/test/Transforms/GVNHoist/infinite-loop-indirect.ll index 2ad6a79a763..9fd77f5e472 100644 --- a/test/Transforms/GVNHoist/infinite-loop-indirect.ll +++ b/test/Transforms/GVNHoist/infinite-loop-indirect.ll @@ -2,7 +2,7 @@ ; Checking gvn-hoist in case of indirect branches. -; Check that the bitcast is is not hoisted because it is after an indirect call +; Check that the bitcast is not hoisted because it is after an indirect call ; CHECK-LABEL: @foo ; CHECK-LABEL: l1.preheader: ; CHECK-NEXT: bitcast