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[MIR-Canon] Hardening propagateLocalCopies.

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This is am almost NFC, it does the following:
- If there is no register class for a COPY's src or dst, bail.
- Fixes uses iterator invalidation bug.

Differential Revision: https://reviews.llvm.org/D62713

llvm-svn: 362191
This commit is contained in:
Puyan Lotfi 2019-05-31 04:49:58 +00:00
parent 84feefcd69
commit eeeb479eef
2 changed files with 19 additions and 6 deletions
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16
lib/CodeGen/MIRCanonicalizerPass.cpp
View File

@ -343,15 +343,23 @@ static bool propagateLocalCopies(MachineBasicBlock *MBB) {
continue; continue;
if (!TargetRegisterInfo::isVirtualRegister(Src)) if (!TargetRegisterInfo::isVirtualRegister(Src))
continue; continue;
// Not folding COPY instructions if regbankselect has not set the RCs.
// Why are we only considering Register Classes? Because the verifier
// sometimes gets upset if the register classes don't match even if the
// types do. A future patch might add COPY folding for matching types in
// pre-registerbankselect code.
if (!MRI.getRegClassOrNull(Dst))
continue;
if (MRI.getRegClass(Dst) != MRI.getRegClass(Src)) if (MRI.getRegClass(Dst) != MRI.getRegClass(Src))
continue; continue;
for (auto UI = MRI.use_begin(Dst); UI != MRI.use_end(); ++UI) { std::vector<MachineOperand *> Uses;
MachineOperand *MO = &*UI; for (auto UI = MRI.use_begin(Dst); UI != MRI.use_end(); ++UI)
Uses.push_back(&*UI);
for (auto *MO : Uses)
MO->setReg(Src); MO->setReg(Src);
Changed = true;
}
Changed = true;
MI->eraseFromParent(); MI->eraseFromParent();
} }

9
test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir
View File

@ -1,8 +1,13 @@
# RUN: llc -o - -march=amdgcn -run-pass mir-canonicalizer -x mir %s | FileCheck %s # RUN: llc -o - -march=amdgcn -run-pass mir-canonicalizer -x mir %s | FileCheck %s
# CHECK: %namedVReg4354:vgpr_32 = COPY $vgpr0
# CHECK: %namedVReg1352:vgpr_32 = COPY %namedVReg4353 # CHECK: %namedVReg1352:vgpr_32 = COPY %namedVReg4353
# CHECK: %namedVReg1359:vgpr_32 = COPY %namedVReg1362 # CHECK-NEXT: %namedVReg1358:vgpr_32 = COPY %namedVReg1361
# CHECK: %namedVReg1360:vgpr_32 = COPY %namedVReg1363 # CHECK-NEXT: %namedVReg1359:vgpr_32 = COPY %namedVReg1362
# CHECK-NEXT: %namedVReg1353:vreg_64 = REG_SEQUENCE %namedVReg4354, %subreg.sub0, %namedVReg1352, %subreg.sub1
# CHECK-NEXT: %namedVReg1354:sgpr_128 = REG_SEQUENCE %namedVReg4354, %subreg.sub0, %namedVReg1352, %subreg.sub1, %namedVReg1358, %subreg.sub2, %namedVReg1359, %subreg.sub3
# This tests for the itereator invalidation fix (reviews.llvm.org/D62713)
# CHECK-NEXT: BUFFER_STORE_DWORD_ADDR64 %namedVReg1352, %namedVReg1353, %namedVReg1354, 0, 0, 0, 0, 0, 0, implicit $exec
... ...
--- ---
name: foo name: foo