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Fix a register scavenger crash when dealing with undefined subregs.

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The LowerSubregs pass needs to preserve implicit def operands attached to
EXTRACT_SUBREG instructions when it replaces those instructions with copies.

llvm-svn: 107189
This commit is contained in:
Bob Wilson 2010-06-29 18:42:49 +00:00
parent e60533aa42
commit ef26313c6b
2 changed files with 33 additions and 0 deletions
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18
lib/CodeGen/LowerSubregs.cpp
View File

@ -62,6 +62,7 @@ namespace {
void TransferKillFlag(MachineInstr *MI, unsigned SrcReg,
const TargetRegisterInfo *TRI,
bool AddIfNotFound = false);
void TransferImplicitDefs(MachineInstr *MI);
};
char LowerSubregsInstructionPass::ID = 0;
@ -104,6 +105,22 @@ LowerSubregsInstructionPass::TransferKillFlag(MachineInstr *MI,
}
}
/// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered
/// replacement instructions immediately precede it. Copy any implicit-def
/// operands from MI to the replacement instruction.
void
LowerSubregsInstructionPass::TransferImplicitDefs(MachineInstr *MI) {
MachineBasicBlock::iterator CopyMI = MI;
--CopyMI;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg() || !MO.isImplicit() || MO.isUse())
continue;
CopyMI->addOperand(MachineOperand::CreateReg(MO.getReg(), true, true));
}
}
bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) {
MachineBasicBlock *MBB = MI->getParent();
@ -149,6 +166,7 @@ bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) {
TransferDeadFlag(MI, DstReg, TRI);
if (MI->getOperand(1).isKill())
TransferKillFlag(MI, SuperReg, TRI, true);
TransferImplicitDefs(MI);
DEBUG({
MachineBasicBlock::iterator dMI = MI;
dbgs() << "subreg: " << *(--dMI);

15
test/CodeGen/ARM/2010-06-29-SubregImpDefs.ll Normal file
View File

@ -0,0 +1,15 @@
; RUN: llc < %s -march=arm -mattr=+neon
@.str271 = external constant [21 x i8], align 4 ; <[21 x i8]*> [#uses=1]
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i32, i8**)* @main to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
define i32 @main(i32 %argc, i8** %argv) nounwind {
entry:
%0 = shufflevector <2 x i64> undef, <2 x i64> zeroinitializer, <2 x i32> <i32 1, i32 2> ; <<2 x i64>> [#uses=1]
store <2 x i64> %0, <2 x i64>* undef, align 16
%val4723 = load <8 x i16>* undef ; <<8 x i16>> [#uses=1]
call void @PrintShortX(i8* getelementptr inbounds ([21 x i8]* @.str271, i32 0, i32 0), <8 x i16> %val4723, i32 0) nounwind
ret i32 undef
}
declare void @PrintShortX(i8*, <8 x i16>, i32) nounwind