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Revert "[SLP] Additional tests with the cost of vector operations."

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This reverts commit a61718435fc4118c82f8aa6133fd81f803789c1e.

llvm-svn: 288371
This commit is contained in:
Alexey Bataev 2016-12-01 16:45:04 +00:00
parent ecf9aaa497
commit ef66b3c144
2 changed files with 1 additions and 20 deletions
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2
test/Analysis/CostModel/X86/reduction.ll
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@ -34,8 +34,6 @@ define fastcc i32 @reduction_cost_int(<8 x i32> %rdx) {
; CHECK-LABEL: reduction_cost_int
; CHECK: cost of 17 {{.*}} extractelement
; AVX-LABEL: reduction_cost_int
; AVX: cost of 5 {{.*}} extractelement
%r = extractelement <8 x i32> %bin.rdx.3, i32 0
ret i32 %r

19
test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll
View File

@ -1,6 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -slp-vectorizer -slp-vectorize-hor -S -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 -debug < %s 2>&1 | FileCheck %s
; RUN: opt -slp-vectorizer -slp-vectorize-hor -S -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -debug < %s 2>&1 | FileCheck --check-prefix=SSE2 %s
; RUN: opt -slp-vectorizer -slp-vectorize-hor -S -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 < %s | FileCheck %s
; int test(unsigned int *p) {
; int sum = 0;
@ -9,10 +8,6 @@
; return sum;
; }
; Vector cost is 5, Scalar cost is 32
; CHECK: Adding cost -27 for reduction that starts with %7 = load i32, i32* %arrayidx.7, align 4 (It is a splitting reduction)
; Vector cost is 17, Scalar cost is 16
; SSE2: Adding cost 1 for reduction that starts with %7 = load i32, i32* %arrayidx.7, align 4 (It is a splitting reduction)
define i32 @test(i32* nocapture readonly %p) {
; CHECK-LABEL: @test(
; CHECK: [[BC:%.*]] = bitcast i32* %p to <8 x i32>*
@ -26,18 +21,6 @@ define i32 @test(i32* nocapture readonly %p) {
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <8 x i32> [[BIN_RDX4]], i32 0
; CHECK: ret i32 [[TMP2]]
;
; SSE2-LABEL: @test(
; SSE2: [[BC:%.*]] = bitcast i32* %p to <8 x i32>*
; SSE2-NEXT: [[LD:%.*]] = load <8 x i32>, <8 x i32>* [[BC]], align 4
; SSE2: [[RDX_SHUF:%.*]] = shufflevector <8 x i32> [[LD]], <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
; SSE2-NEXT: [[BIN_RDX:%.*]] = add <8 x i32> [[LD]], [[RDX_SHUF]]
; SSE2-NEXT: [[RDX_SHUF1:%.*]] = shufflevector <8 x i32> [[BIN_RDX]], <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
; SSE2-NEXT: [[BIN_RDX2:%.*]] = add <8 x i32> [[BIN_RDX]], [[RDX_SHUF1]]
; SSE2-NEXT: [[RDX_SHUF3:%.*]] = shufflevector <8 x i32> [[BIN_RDX2]], <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
; SSE2-NEXT: [[BIN_RDX4:%.*]] = add <8 x i32> [[BIN_RDX2]], [[RDX_SHUF3]]
; SSE2-NEXT: [[TMP2:%.*]] = extractelement <8 x i32> [[BIN_RDX4]], i32 0
; SSE2: ret i32 [[TMP2]]
;
entry:
%0 = load i32, i32* %p, align 4
%arrayidx.1 = getelementptr inbounds i32, i32* %p, i64 1