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ifdef out some dead code.
Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll llvm-svn: 35082
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@ -992,6 +992,7 @@ static bool MaskedValueIsZero(Value *V, uint64_t Mask, unsigned Depth = 0) {
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return (KnownZero & Mask) == Mask;
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}
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#if 0
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/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
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/// this predicate to simplify operations downstream. Mask is known to be zero
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/// for bits that V cannot have.
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@ -1001,6 +1002,7 @@ static bool MaskedValueIsZero(Value *V, const APInt& Mask, unsigned Depth = 0) {
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assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
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return (KnownZero & Mask) == Mask;
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}
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#endif
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/// ShrinkDemandedConstant - Check to see if the specified operand of the
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/// specified instruction is a constant integer. If so, check to see if there
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@ -3608,8 +3610,9 @@ struct FoldICmpLogical {
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ICI->swapOperands(); // Swap the LHS and RHS of the ICmp
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}
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ICmpInst *RHSICI = cast<ICmpInst>(Log.getOperand(1));
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unsigned LHSCode = getICmpCode(ICI);
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unsigned RHSCode = getICmpCode(cast<ICmpInst>(Log.getOperand(1)));
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unsigned RHSCode = getICmpCode(RHSICI);
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unsigned Code;
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switch (Log.getOpcode()) {
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case Instruction::And: Code = LHSCode & RHSCode; break;
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@ -3618,7 +3621,10 @@ struct FoldICmpLogical {
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default: assert(0 && "Illegal logical opcode!"); return 0;
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}
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Value *RV = getICmpValue(ICmpInst::isSignedPredicate(pred), Code, LHS, RHS);
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bool isSigned = ICmpInst::isSignedPredicate(RHSICI->getPredicate()) ||
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ICmpInst::isSignedPredicate(ICI->getPredicate());
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Value *RV = getICmpValue(isSigned, Code, LHS, RHS);
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if (Instruction *I = dyn_cast<Instruction>(RV))
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return I;
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// Otherwise, it's a constant boolean value...
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