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[PowerPC] Don't mark the return-address slot as immutable
It is tempting to mark the fixed stack slot used to store the return address as immutable when lowering @llvm.returnaddress(i32 0). Unfortunately, within the function, it is not completely immutable: it is written during the function prologue. When using post-RA instruction scheduling, the prologue instructions are available for scheduling, and we're not free to interchange the order of a particular store in the prologue with loads from that stack location. Fixes PR21976. llvm-svn: 224761
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@ -5164,7 +5164,7 @@ PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG & DAG) const {
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// Find out what the fix offset of the frame pointer save area.
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int LROffset = PPCFrameLowering::getReturnSaveOffset(isPPC64, isDarwinABI);
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// Allocate the frame index for frame pointer save area.
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RASI = MF.getFrameInfo()->CreateFixedObject(isPPC64? 8 : 4, LROffset, true);
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RASI = MF.getFrameInfo()->CreateFixedObject(isPPC64? 8 : 4, LROffset, false);
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// Save the result.
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FI->setReturnAddrSaveIndex(RASI);
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}
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25
test/CodeGen/PowerPC/retaddr2.ll
Normal file
25
test/CodeGen/PowerPC/retaddr2.ll
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@ -0,0 +1,25 @@
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; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define i8* @test1() #0 {
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entry:
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%0 = tail call i8* @llvm.returnaddress(i32 0)
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ret i8* %0
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}
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; CHECK-LABEL: @test1
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; CHECK: mflr 0
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; CHECK: std 0, 16(1)
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; FIXME: These next two lines don't both need to load the same value.
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; CHECK-DAG: ld 3, 16(1)
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; CHECK-DAG: ld 0, 16(1)
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; CHECK: mtlr 0
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; CHECK: blr
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; Function Attrs: nounwind readnone
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declare i8* @llvm.returnaddress(i32) #0
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attributes #0 = { nounwind readnone }
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