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[PowerPC] Don't mark the return-address slot as immutable

It is tempting to mark the fixed stack slot used to store the return address as
immutable when lowering @llvm.returnaddress(i32 0). Unfortunately, within the
function, it is not completely immutable: it is written during the function
prologue. When using post-RA instruction scheduling, the prologue instructions
are available for scheduling, and we're not free to interchange the order of a
particular store in the prologue with loads from that stack location.

Fixes PR21976.

llvm-svn: 224761
This commit is contained in:
Hal Finkel 2014-12-23 09:45:06 +00:00
parent cfbcf5995c
commit f0195675c6
2 changed files with 26 additions and 1 deletions

View File

@ -5164,7 +5164,7 @@ PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG & DAG) const {
// Find out what the fix offset of the frame pointer save area.
int LROffset = PPCFrameLowering::getReturnSaveOffset(isPPC64, isDarwinABI);
// Allocate the frame index for frame pointer save area.
RASI = MF.getFrameInfo()->CreateFixedObject(isPPC64? 8 : 4, LROffset, true);
RASI = MF.getFrameInfo()->CreateFixedObject(isPPC64? 8 : 4, LROffset, false);
// Save the result.
FI->setReturnAddrSaveIndex(RASI);
}

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@ -0,0 +1,25 @@
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
; Function Attrs: nounwind readnone
define i8* @test1() #0 {
entry:
%0 = tail call i8* @llvm.returnaddress(i32 0)
ret i8* %0
}
; CHECK-LABEL: @test1
; CHECK: mflr 0
; CHECK: std 0, 16(1)
; FIXME: These next two lines don't both need to load the same value.
; CHECK-DAG: ld 3, 16(1)
; CHECK-DAG: ld 0, 16(1)
; CHECK: mtlr 0
; CHECK: blr
; Function Attrs: nounwind readnone
declare i8* @llvm.returnaddress(i32) #0
attributes #0 = { nounwind readnone }