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[X86][SSE] Add test showing missing compute known bits PSADBW handling

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The upper 48-bits of each i64 element is guaranteed to be zero.

llvm-svn: 368557
This commit is contained in:
Simon Pilgrim 2019-08-12 12:13:08 +00:00
parent 6f6eb9e7e1
commit f01bfd8575
1 changed files with 18 additions and 0 deletions
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test/CodeGen/X86/psadbw.ll Normal file
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
; Only bottom 16 bits are set - upper 48 bits are zero.
define <2 x i64> @combine_psadbw_shift(<16 x i8> %0, <16 x i8> %1) {
; CHECK-LABEL: combine_psadbw_shift:
; CHECK: # %bb.0:
; CHECK-NEXT: psadbw %xmm1, %xmm0
; CHECK-NEXT: psrlq $48, %xmm0
; CHECK-NEXT: ret{{[l|q]}}
%3 = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %0, <16 x i8> %1)
%4 = lshr <2 x i64> %3, <i64 48, i64 48>
ret <2 x i64> %4
}
declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>)