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fix the spill code

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llvm-svn: 29583
This commit is contained in:
Rafael Espindola 2006-08-09 16:41:12 +00:00
parent 9e8af5c486
commit f0b265b48b
3 changed files with 18 additions and 9 deletions
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6
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -148,6 +148,12 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
Ops.push_back(Chain); Ops.push_back(Chain);
Ops.push_back(Callee); Ops.push_back(Callee);
// Add argument registers to the end of the list so that they are known live
// into the call.
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
RegsToPass[i].second.getValueType()));
unsigned CallOpc = ARMISD::CALL; unsigned CallOpc = ARMISD::CALL;
if (InFlag.Val) if (InFlag.Val)
Ops.push_back(InFlag); Ops.push_back(InFlag);

16
lib/Target/ARM/ARMRegisterInfo.cpp
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@ -31,9 +31,8 @@ void ARMRegisterInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SrcReg, int FI, unsigned SrcReg, int FI,
const TargetRegisterClass *RC) const { const TargetRegisterClass *RC) const {
// On the order of operands here: think "[FI + 0] = SrcReg".
assert (RC == ARM::IntRegsRegisterClass); assert (RC == ARM::IntRegsRegisterClass);
BuildMI(MBB, I, ARM::str, 3).addFrameIndex(FI).addImm(0).addReg(SrcReg); BuildMI(MBB, I, ARM::str, 3).addReg(SrcReg).addImm(0).addFrameIndex(FI);
} }
void ARMRegisterInfo:: void ARMRegisterInfo::
@ -41,7 +40,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned DestReg, int FI, unsigned DestReg, int FI,
const TargetRegisterClass *RC) const { const TargetRegisterClass *RC) const {
assert (RC == ARM::IntRegsRegisterClass); assert (RC == ARM::IntRegsRegisterClass);
BuildMI(MBB, I, ARM::ldr, 2, DestReg).addFrameIndex(FI).addImm(0); BuildMI(MBB, I, ARM::ldr, 2, DestReg).addImm(0).addFrameIndex(FI);
} }
void ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB, void ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
@ -81,7 +80,8 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
MachineBasicBlock &MBB = *MI.getParent(); MachineBasicBlock &MBB = *MI.getParent();
MachineFunction &MF = *MBB.getParent(); MachineFunction &MF = *MBB.getParent();
assert (MI.getOpcode() == ARM::ldr); assert (MI.getOpcode() == ARM::ldr ||
MI.getOpcode() == ARM::str);
unsigned FrameIdx = 2; unsigned FrameIdx = 2;
unsigned OffIdx = 1; unsigned OffIdx = 1;
@ -93,6 +93,11 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
unsigned StackSize = MF.getFrameInfo()->getStackSize(); unsigned StackSize = MF.getFrameInfo()->getStackSize();
//<hack>
if (Offset < 0)
Offset -= 4;
//</hack>
Offset += StackSize; Offset += StackSize;
assert (Offset >= 0); assert (Offset >= 0);
@ -121,9 +126,6 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const {
MachineFrameInfo *MFI = MF.getFrameInfo(); MachineFrameInfo *MFI = MF.getFrameInfo();
int NumBytes = (int) MFI->getStackSize(); int NumBytes = (int) MFI->getStackSize();
//hack
assert(NumBytes == 0);
if (MFI->hasCalls()) { if (MFI->hasCalls()) {
// We reserve argument space for call sites in the function immediately on // We reserve argument space for call sites in the function immediately on
// entry to the current function. This eliminates the need for add/sub // entry to the current function. This eliminates the need for add/sub

3
test/Regression/CodeGen/ARM/vargs.ll
View File

@ -6,7 +6,8 @@ implementation ; Functions:
int %main() { int %main() {
entry: entry:
%tmp = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([43 x sbyte]* %str, int 0, uint 0), int 1, int 2, int 3, int 4, int 5, int 6, int 7, int 8, int 9, int 10 ) ; <int> [#uses=0] %tmp = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([43 x sbyte]* %str, int 0, uint 0), int 1, int 2, int 3, int 4, int 5, int 6, int 7, int 8, int 9, int 10 ) ; <int> [#uses=0]
ret int 0 %tmp2 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([43 x sbyte]* %str, int 0, uint 0), int 10, int 9, int 8, int 7, int 6, int 5, int 4, int 3, int 2, int 1 ) ; <int> [#uses=0]
ret int 11
} }
declare int %printf(sbyte*, ...) declare int %printf(sbyte*, ...)