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Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.

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llvm-svn: 108062
This commit is contained in:
Jakob Stoklund Olesen 2010-07-10 22:42:59 +00:00
parent 9b0f71f68f
commit f0d1bf23eb
7 changed files with 62 additions and 98 deletions
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9
lib/CodeGen/MachineRegisterInfo.cpp
View File

@ -194,12 +194,9 @@ MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB,
--i; --e;
} else {
// Emit a copy.
const TargetRegisterClass *RC = getRegClass(LiveIns[i].second);
bool Emitted = TII.copyRegToReg(*EntryMBB, EntryMBB->begin(),
LiveIns[i].second, LiveIns[i].first,
RC, RC, DebugLoc());
assert(Emitted && "Unable to issue a live-in copy instruction!\n");
(void) Emitted;
BuildMI(*EntryMBB, EntryMBB->begin(), DebugLoc(),
TII.get(TargetOpcode::COPY), LiveIns[i].second)
.addReg(LiveIns[i].first);
// Add the register to the entry block live-in set.
EntryMBB->addLiveIn(LiveIns[i].first);

32
lib/CodeGen/Spiller.cpp
View File

@ -14,6 +14,7 @@
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
@ -337,10 +338,9 @@ private:
// Insert a copy at the start of the MBB. The range proceeding the
// copy will be attached to the original LiveInterval.
MachineBasicBlock *defMBB = lis->getMBBFromIndex(newVNI->def);
tii->copyRegToReg(*defMBB, defMBB->begin(), newVReg, li->reg, trc, trc,
DebugLoc());
MachineInstr *copyMI = defMBB->begin();
copyMI->addRegisterKilled(li->reg, tri);
MachineInstr *copyMI = BuildMI(*defMBB, defMBB->begin(), DebugLoc(),
tii->get(TargetOpcode::COPY), newVReg)
.addReg(li->reg, RegState::Kill);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);
VNInfo *phiDefVNI = li->getNextValue(lis->getMBBStartIdx(defMBB),
0, false, lis->getVNInfoAllocator());
@ -390,11 +390,10 @@ private:
if (isTwoAddr && !twoAddrUseIsUndef) {
MachineBasicBlock *defMBB = defInst->getParent();
tii->copyRegToReg(*defMBB, defInst, newVReg, li->reg, trc, trc,
DebugLoc());
MachineInstr *copyMI = prior(MachineBasicBlock::iterator(defInst));
MachineInstr *copyMI = BuildMI(*defMBB, defInst, DebugLoc(),
tii->get(TargetOpcode::COPY), newVReg)
.addReg(li->reg, RegState::Kill);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);
copyMI->addRegisterKilled(li->reg, tri);
LiveRange *origUseRange =
li->getLiveRangeContaining(newVNI->def.getUseIndex());
origUseRange->end = copyIdx.getDefIndex();
@ -440,10 +439,9 @@ private:
// reg.
MachineBasicBlock *useMBB = useInst->getParent();
MachineBasicBlock::iterator useItr(useInst);
tii->copyRegToReg(*useMBB, llvm::next(useItr), li->reg, newVReg, trc,
trc, DebugLoc());
MachineInstr *copyMI = llvm::next(useItr);
copyMI->addRegisterKilled(newVReg, tri);
MachineInstr *copyMI = BuildMI(*useMBB, llvm::next(useItr), DebugLoc(),
tii->get(TargetOpcode::COPY), newVReg)
.addReg(li->reg, RegState::Kill);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);
// Change the old two-address defined range & vni to start at
@ -471,12 +469,10 @@ private:
continue;
SlotIndex killIdx = LRI->end;
MachineBasicBlock *killMBB = lis->getMBBFromIndex(killIdx);
tii->copyRegToReg(*killMBB, killMBB->getFirstTerminator(),
li->reg, newVReg, trc, trc,
DebugLoc());
MachineInstr *copyMI = prior(killMBB->getFirstTerminator());
copyMI->addRegisterKilled(newVReg, tri);
MachineInstr *copyMI = BuildMI(*killMBB, killMBB->getFirstTerminator(),
DebugLoc(), tii->get(TargetOpcode::COPY),
li->reg)
.addReg(newVReg, RegState::Kill);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);
// Save the current end. We may need it to add a new range if the

9
lib/CodeGen/StackSlotColoring.cpp
View File

@ -19,6 +19,7 @@
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@ -609,8 +610,8 @@ StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
DEBUG(MI->dump());
++NumLoadElim;
} else {
TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC,
MI->getDebugLoc());
BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(TargetOpcode::COPY),
DstReg).addReg(Reg);
++NumRegRepl;
}
@ -626,8 +627,8 @@ StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
DEBUG(MI->dump());
++NumStoreElim;
} else {
TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC,
MI->getDebugLoc());
BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(TargetOpcode::COPY), Reg)
.addReg(SrcReg);
++NumRegRepl;
}

19
lib/CodeGen/StrongPHIElimination.cpp
View File

@ -25,6 +25,7 @@
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterCoalescer.h"
@ -695,9 +696,8 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
// Insert copy from curr.second to a temporary at
// the Phi defining curr.second
MachineBasicBlock::iterator PI = MRI.getVRegDef(curr.second);
TII->copyRegToReg(*PI->getParent(), PI, t,
curr.second, RC, RC, DebugLoc());
BuildMI(*PI->getParent(), PI, DebugLoc(), TII->get(TargetOpcode::COPY),
t).addReg(curr.second);
DEBUG(dbgs() << "Inserted copy from " << curr.second << " to " << t
<< "\n");
@ -712,8 +712,8 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
}
// Insert copy from map[curr.first] to curr.second
TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), curr.second,
map[curr.first], RC, RC, DebugLoc());
BuildMI(*MBB, MBB->getFirstTerminator(), DebugLoc(),
TII->get(TargetOpcode::COPY), curr.second).addReg(map[curr.first]);
map[curr.first] = curr.second;
DEBUG(dbgs() << "Inserted copy from " << curr.first << " to "
<< curr.second << "\n");
@ -761,8 +761,8 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
// Insert a copy from dest to a new temporary t at the end of b
unsigned t = MF->getRegInfo().createVirtualRegister(RC);
TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), t,
curr.second, RC, RC, DebugLoc());
BuildMI(*MBB, MBB->getFirstTerminator(), DebugLoc(),
TII->get(TargetOpcode::COPY), t).addReg(curr.second);
map[curr.second] = t;
MachineBasicBlock::iterator TI = MBB->getFirstTerminator();
@ -956,9 +956,8 @@ bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) {
} else {
// Insert a last-minute copy if a conflict was detected.
const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo();
const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(I->first);
TII->copyRegToReg(*SI->second, SI->second->getFirstTerminator(),
I->first, SI->first, RC, RC, DebugLoc());
BuildMI(*SI->second, SI->second->getFirstTerminator(), DebugLoc(),
TII->get(TargetOpcode::COPY), I->first).addReg(SI->first);
LI.renumber();

18
lib/CodeGen/TailDuplication.cpp
View File

@ -17,6 +17,7 @@
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/MachineSSAUpdater.h"
#include "llvm/Target/TargetInstrInfo.h"
@ -559,11 +560,9 @@ TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
}
MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
const TargetRegisterClass *RC = MRI->getRegClass(CopyInfos[i].first);
TII->copyRegToReg(*PredBB, Loc, CopyInfos[i].first,
CopyInfos[i].second, RC,RC, DebugLoc());
MachineInstr *CopyMI = prior(Loc);
Copies.push_back(CopyMI);
Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
TII->get(TargetOpcode::COPY),
CopyInfos[i].first).addReg(CopyInfos[i].second));
}
NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
@ -618,11 +617,10 @@ TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
}
MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator();
for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
const TargetRegisterClass *RC = MRI->getRegClass(CopyInfos[i].first);
TII->copyRegToReg(*PrevBB, Loc, CopyInfos[i].first,
CopyInfos[i].second, RC, RC, DebugLoc());
MachineInstr *CopyMI = prior(Loc);
Copies.push_back(CopyMI);
Copies.push_back(BuildMI(*PrevBB, Loc, DebugLoc(),
TII->get(TargetOpcode::COPY),
CopyInfos[i].first)
.addReg(CopyInfos[i].second));
}
} else {
// No PHIs to worry about, just splice the instructions over.

32
lib/CodeGen/TwoAddressInstructionPass.cpp
View File

@ -1437,10 +1437,9 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
if (DefMI->isCopy() && DefMI->getOperand(1).getSubReg())
RealSrcs.push_back(DefMI->getOperand(1).getReg());
if (!Seen.insert(SrcReg) ||
MI->getParent() != DefMI->getParent() ||
!MI->getOperand(i).isKill() ||
HasOtherRegSequenceUses(SrcReg, MI, MRI)) {
bool isKill = MI->getOperand(i).isKill();
if (!Seen.insert(SrcReg) || MI->getParent() != DefMI->getParent() ||
!isKill || HasOtherRegSequenceUses(SrcReg, MI, MRI)) {
// REG_SEQUENCE cannot have duplicated operands, add a copy.
// Also add an copy if the source is live-in the block. We don't want
// to end up with a partial-redef of a livein, e.g.
@ -1456,28 +1455,21 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
// If the REG_SEQUENCE doesn't kill its source, keeping live variables
// correctly up to date becomes very difficult. Insert a copy.
//
const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
unsigned NewReg = MRI->createVirtualRegister(RC);
MachineBasicBlock::iterator InsertLoc = MI;
bool Emitted =
TII->copyRegToReg(*MI->getParent(), InsertLoc, NewReg, SrcReg, RC, RC,
MI->getDebugLoc());
(void)Emitted;
assert(Emitted && "Unable to issue a copy instruction!\n");
MI->getOperand(i).setReg(NewReg);
if (MI->getOperand(i).isKill()) {
MachineBasicBlock::iterator CopyMI = prior(InsertLoc);
MachineOperand *KillMO = CopyMI->findRegisterUseOperand(SrcReg);
KillMO->setIsKill();
if (LV)
// Update live variables
LV->replaceKillInstruction(SrcReg, MI, &*CopyMI);
}
MachineInstr *CopyMI = BuildMI(*MI->getParent(), InsertLoc,
MI->getDebugLoc(), TII->get(TargetOpcode::COPY))
.addReg(DstReg, RegState::Define, MI->getOperand(i+1).getImm())
.addReg(SrcReg, getKillRegState(isKill));
MI->getOperand(i).setReg(0);
if (LV && isKill)
LV->replaceKillInstruction(SrcReg, MI, CopyMI);
DEBUG(dbgs() << "Inserted: " << *CopyMI);
}
}
for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
unsigned SrcReg = MI->getOperand(i).getReg();
if (!SrcReg) continue;
unsigned SubIdx = MI->getOperand(i+1).getImm();
UpdateRegSequenceSrcs(SrcReg, DstReg, SubIdx, MRI, *TRI);
}

41
lib/CodeGen/VirtRegRewriter.cpp
View File

@ -1758,7 +1758,6 @@ bool LocalRewriter::InsertRestores(MachineInstr *MI,
bool DoReMat = VRM->isReMaterialized(VirtReg);
int SSorRMId = DoReMat
? VRM->getReMatId(VirtReg) : VRM->getStackSlot(VirtReg);
const TargetRegisterClass* RC = MRI->getRegClass(VirtReg);
unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
if (InReg == Phys) {
// If the value is already available in the expected register, save
@ -1792,20 +1791,16 @@ bool LocalRewriter::InsertRestores(MachineInstr *MI,
MachineBasicBlock::iterator InsertLoc =
ComputeReloadLoc(MII, MBB->begin(), Phys, TRI, DoReMat, SSorRMId, TII,
*MBB->getParent());
TII->copyRegToReg(*MBB, InsertLoc, Phys, InReg, RC, RC,
MI->getDebugLoc());
MachineInstr *CopyMI = BuildMI(*MBB, InsertLoc, MI->getDebugLoc(),
TII->get(TargetOpcode::COPY), Phys)
.addReg(InReg, RegState::Kill);
// This invalidates Phys.
Spills.ClobberPhysReg(Phys);
// Remember it's available.
Spills.addAvailable(SSorRMId, Phys);
// Mark is killed.
MachineInstr *CopyMI = prior(InsertLoc);
CopyMI->setAsmPrinterFlag(MachineInstr::ReloadReuse);
MachineOperand *KillOpnd = CopyMI->findRegisterUseOperand(InReg);
KillOpnd->setIsKill();
UpdateKills(*CopyMI, TRI, RegKills, KillOps);
DEBUG(dbgs() << '\t' << *CopyMI);
@ -2149,7 +2144,6 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
continue;
}
const TargetRegisterClass* RC = MRI->getRegClass(VirtReg);
MRI->setPhysRegUsed(DesignatedReg);
ReusedOperands.markClobbered(DesignatedReg);
@ -2157,11 +2151,9 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
MachineBasicBlock::iterator InsertLoc =
ComputeReloadLoc(&MI, MBB->begin(), PhysReg, TRI, DoReMat,
SSorRMId, TII, MF);
TII->copyRegToReg(*MBB, InsertLoc, DesignatedReg, PhysReg, RC, RC,
MI.getDebugLoc());
MachineInstr *CopyMI = prior(InsertLoc);
MachineInstr *CopyMI = BuildMI(*MBB, InsertLoc, MI.getDebugLoc(),
TII->get(TargetOpcode::COPY),
DesignatedReg).addReg(PhysReg);
CopyMI->setAsmPrinterFlag(MachineInstr::ReloadReuse);
UpdateKills(*CopyMI, TRI, RegKills, KillOps);
@ -2282,27 +2274,16 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
DEBUG(dbgs() << "Promoted Load To Copy: " << MI);
if (DestReg != InReg) {
const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
TII->copyRegToReg(*MBB, &MI, DestReg, InReg, RC, RC,
MI.getDebugLoc());
MachineOperand *DefMO = MI.findRegisterDefOperand(DestReg);
unsigned SubIdx = DefMO->getSubReg();
MachineInstr *CopyMI = BuildMI(*MBB, &MI, MI.getDebugLoc(),
TII->get(TargetOpcode::COPY))
.addReg(DestReg, RegState::Define, DefMO->getSubReg())
.addReg(InReg, RegState::Kill);
// Revisit the copy so we make sure to notice the effects of the
// operation on the destreg (either needing to RA it if it's
// virtual or needing to clobber any values if it's physical).
NextMII = &MI;
--NextMII; // backtrack to the copy.
NextMII = CopyMI;
NextMII->setAsmPrinterFlag(MachineInstr::ReloadReuse);
// Propagate the sub-register index over.
if (SubIdx) {
DefMO = NextMII->findRegisterDefOperand(DestReg);
DefMO->setSubReg(SubIdx);
}
// Mark is killed.
MachineOperand *KillOpnd = NextMII->findRegisterUseOperand(InReg);
KillOpnd->setIsKill();
BackTracked = true;
} else {
DEBUG(dbgs() << "Removing now-noop copy: " << MI);