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[mc] Clean up emission of byte sequences
No functional change intended. llvm-svn: 235178
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@ -412,10 +412,7 @@ void ELFObjectWriter::WriteHeader(const MCAssembler &Asm,
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// emitWord method behaves differently for ELF32 and ELF64, writing
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// 4 bytes in the former and 8 in the latter.
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Write8(0x7f); // e_ident[EI_MAG0]
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Write8('E'); // e_ident[EI_MAG1]
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Write8('L'); // e_ident[EI_MAG2]
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Write8('F'); // e_ident[EI_MAG3]
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WriteBytes(ELF::ElfMagic); // e_ident[EI_MAG0] to e_ident[EI_MAG3]
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Write8(is64Bit() ? ELF::ELFCLASS64 : ELF::ELFCLASS32); // e_ident[EI_CLASS]
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@ -915,8 +915,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
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Asm.writeSectionData(it, Layout);
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uint64_t Pad = getPaddingSize(it, Layout);
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for (unsigned int i = 0; i < Pad; ++i)
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Write8(0);
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WriteZeros(Pad);
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}
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// Write the extra padding.
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@ -530,8 +530,7 @@ void WinCOFFObjectWriter::WriteFileHeader(const COFF::header &Header) {
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WriteLE16(COFF::BigObjHeader::MinBigObjectVersion);
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WriteLE16(Header.Machine);
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WriteLE32(Header.TimeDateStamp);
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for (uint8_t MagicChar : COFF::BigObjMagic)
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Write8(MagicChar);
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WriteBytes(StringRef(COFF::BigObjMagic, sizeof(COFF::BigObjMagic)));
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WriteLE32(0);
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WriteLE32(0);
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WriteLE32(0);
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@ -247,10 +247,7 @@ bool AArch64AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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// If the count is not 4-byte aligned, we must be writing data into the text
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// section (otherwise we have unaligned instructions, and thus have far
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// bigger problems), so just write zeros instead.
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if ((Count & 3) != 0) {
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for (uint64_t i = 0, e = (Count & 3); i != e; ++i)
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OW->Write8(0);
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}
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OW->WriteZeros(Count % 4);
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// We are properly aligned, so write NOPs as requested.
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Count /= 4;
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@ -394,12 +394,7 @@ bool MipsAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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// If the count is not 4-byte aligned, we must be writing data into the text
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// section (otherwise we have unaligned instructions, and thus have far
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// bigger problems), so just write zeros instead.
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for (uint64_t i = 0, e = Count % 4; i != e; ++i)
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OW->Write8(0);
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uint64_t NumNops = Count / 4;
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for (uint64_t i = 0; i != NumNops; ++i)
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OW->Write32(0);
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OW->WriteZeros(Count);
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return true;
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}
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@ -178,12 +178,7 @@ public:
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for (uint64_t i = 0; i != NumNops; ++i)
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OW->Write32(0x60000000);
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switch (Count % 4) {
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default: break; // No leftover bytes to write
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case 1: OW->Write8(0); break;
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case 2: OW->Write16(0); break;
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case 3: OW->Write16(0); OW->Write8(0); break;
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}
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OW->WriteZeros(Count % 4);
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return true;
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}
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@ -115,8 +115,7 @@ const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(
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}
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bool AMDGPUAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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for (unsigned i = 0; i < Count; ++i)
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OW->Write8(0);
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OW->WriteZeros(Count);
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return true;
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}
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