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Store VRBase in a map, not in NodeInfo.
llvm-svn: 26685
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a316d82d2a
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f1be1182f0
@ -151,7 +151,6 @@ namespace llvm {
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bool IsStore : 1; // Is memory store
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unsigned Slot; // Node's time slot
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NodeGroup *Group; // Grouping information
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unsigned VRBase; // Virtual register base
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#ifndef NDEBUG
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unsigned Preorder; // Index before scheduling
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#endif
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@ -166,7 +165,6 @@ namespace llvm {
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, IsCall(false)
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, Slot(0)
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, Group(NULL)
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, VRBase(0)
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#ifndef NDEBUG
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, Preorder(0)
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#endif
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@ -326,14 +324,6 @@ namespace llvm {
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///
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NodeInfo *getNI(SDNode *Node) { return Map[Node]; }
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/// getVR - Returns the virtual register number of the node.
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///
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unsigned getVR(SDOperand Op) {
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NodeInfo *NI = getNI(Op.Val);
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assert(NI->VRBase != 0 && "Node emitted out of order - late");
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return NI->VRBase + Op.ResNo;
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}
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/// isPassiveNode - Return true if the node is a non-scheduled leaf.
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///
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static bool isPassiveNode(SDNode *Node) {
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@ -348,8 +338,10 @@ namespace llvm {
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}
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/// EmitNode - Generate machine code for an node and needed dependencies.
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/// VRBaseMap contains, for each already emitted node, the first virtual
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/// register number for the results of the node.
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///
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void EmitNode(NodeInfo *NI);
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void EmitNode(NodeInfo *NI, std::map<SDNode*, unsigned> &VRBaseMap);
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/// EmitNoop - Emit a noop instruction.
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///
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@ -381,7 +373,8 @@ namespace llvm {
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private:
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void AddOperand(MachineInstr *MI, SDOperand Op, unsigned IIOpNum,
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const TargetInstrDescriptor *II);
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const TargetInstrDescriptor *II,
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std::map<SDNode*, unsigned> &VRBaseMap);
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void AddToGroup(NodeInfo *D, NodeInfo *U);
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protected:
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