RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
Code Issues Projects Releases Wiki Activity

[AMDGPU] Mark .note section SHF_ALLOC so lld creates a segment for it

Browse Source 
Differential Revision: https://reviews.llvm.org/D25694

llvm-svn: 284435
This commit is contained in:
Konstantin Zhuravlyov 2016-10-17 22:40:15 +00:00
parent 75fea7eeef
commit f1c9f3143b
2 changed files with 9 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
View File

@ -97,7 +97,8 @@ void
AMDGPUTargetELFStreamer::EmitDirectiveHSACodeObjectVersion(uint32_t Major,
uint32_t Minor) {
MCStreamer &OS = getStreamer();
MCSectionELF *Note = OS.getContext().getELFSection(".note", ELF::SHT_NOTE, 0);
MCSectionELF *Note =
OS.getContext().getELFSection(".note", ELF::SHT_NOTE, ELF::SHF_ALLOC);
unsigned NameSZ = 4;
@ -120,7 +121,8 @@ AMDGPUTargetELFStreamer::EmitDirectiveHSACodeObjectISA(uint32_t Major,
StringRef VendorName,
StringRef ArchName) {
MCStreamer &OS = getStreamer();
MCSectionELF *Note = OS.getContext().getELFSection(".note", ELF::SHT_NOTE, 0);
MCSectionELF *Note =
OS.getContext().getELFSection(".note", ELF::SHT_NOTE, ELF::SHF_ALLOC);
unsigned NameSZ = 4;
uint16_t VendorNameSize = VendorName.size() + 1;

5
test/CodeGen/AMDGPU/hsa.ll
View File

@ -17,11 +17,16 @@
; ELF: }
; ELF: SHT_NOTE
; ELF: Flags [ (0x2)
; ELF: SHF_ALLOC (0x2)
; ELF: ]
; ELF: SectionData (
; ELF: 0000: 04000000 08000000 01000000 414D4400
; ELF: 0010: 02000000 01000000 04000000 1B000000
; ELF: 0020: 03000000 414D4400 04000700 07000000
; ELF: 0030: 00000000 00000000 414D4400 414D4447
; ELF: 0040: 50550000
; ELF: )
; ELF: Symbol {
; ELF: Name: simple