From f1e0c1f0a8e3cbb092d604f62e8654a7f9a08561 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Fri, 24 Feb 2006 19:18:20 +0000
Subject: [PATCH] rename NumOps -> NumVals to avoid shadowing a NumOps var in
 an outer scope.

Add support for addressing modes.

llvm-svn: 26361
---
 lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 91d7edbe959..b7c7ec37f73 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -326,32 +326,38 @@ void ScheduleDAG::EmitNode(NodeInfo *NI) {
       // Add all of the operand registers to the instruction.
       for (unsigned i = 2; i != NumOps;) {
         unsigned Flags = cast<ConstantSDNode>(Node->getOperand(i))->getValue();
-        unsigned NumOps = Flags >> 3;
+        unsigned NumVals = Flags >> 3;
         
-        MI->addZeroExtImm64Operand(NumOps);
+        MI->addZeroExtImm64Operand(NumVals);
         ++i;  // Skip the ID value.
         
         switch (Flags & 7) {
         default: assert(0 && "Bad flags!");
         case 1:  // Use of register.
-          for (; NumOps; --NumOps, ++i) {
+          for (; NumVals; --NumVals, ++i) {
             unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
             MI->addMachineRegOperand(Reg, MachineOperand::Use);
           }
           break;
         case 2:   // Def of register.
-          for (; NumOps; --NumOps, ++i) {
+          for (; NumVals; --NumVals, ++i) {
             unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
             MI->addMachineRegOperand(Reg, MachineOperand::Def);
           }
           break;
         case 3: { // Immediate.
-          assert(NumOps == 1 && "Unknown immediate value!");
+          assert(NumVals == 1 && "Unknown immediate value!");
           uint64_t Val = cast<ConstantSDNode>(Node->getOperand(i))->getValue();
           MI->addZeroExtImm64Operand(Val);
           ++i;
           break;
         }
+        case 4:  // Addressing mode.
+          // The addressing mode has been selected, just add all of the
+          // operands to the machine instruction.
+          for (; NumVals; --NumVals, ++i)
+            AddOperand(MI, Node->getOperand(i), 0, 0);
+          break;
         }
       }
       break;