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[WebAssembly] Revise the strategy for inline asm.
Previously, an "r" constraint would mean the compiler provides a value on WebAssembly's operand stack. This was tricky to use properly, particularly since it isn't possible to declare a new local from within an inline asm string. With this patch, "r" provides the value in a WebAssembly local, and the local index is provided to the inline asm string. This requires inline asm to use get_local and set_local to read the register. This does potentially result in larger code size, however inline asm should hopefully be quite rare in WebAssembly. This also means that the "m" constraint can no longer be supported, as WebAssembly has nothing like a "memory operand" that includes an implicit get_local. This fixes PR34599 for the wasm32-unknown-unknown-wasm target (though not for the ELF target). llvm-svn: 317707
This commit is contained in:
Dan Gohman
parent
8a8ad647e9
commit
f1ee202e98
@ -267,12 +267,11 @@ bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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if (AsmVariant != 0)
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report_fatal_error("There are no defined alternate asm variants");
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if (!ExtraCode) {
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// TODO: For now, we just hard-code 0 as the constant offset; teach
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// SelectInlineAsmMemoryOperand how to do address mode matching.
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OS << "0(" + regToString(MI->getOperand(OpNo)) + ')';
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return false;
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}
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// The current approach to inline asm is that "r" constraints are expressed
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// as local indices, rather than values on the operand stack. This simplifies
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// using "r" as it eliminates the need to push and pop the values in a
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// particular order, however it also makes it impossible to have an "m"
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// constraint. So we don't support it.
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return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, AsmVariant, ExtraCode, OS);
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}
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@ -294,6 +294,17 @@ bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) {
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unsigned OldReg = MO.getReg();
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// Inline asm may have a def in the middle of the operands. Our contract
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// with inline asm register operands is to provide local indices as
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// immediates.
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if (MO.isDef()) {
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assert(MI.getOpcode() == TargetOpcode::INLINEASM);
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unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
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MRI.removeRegOperandFromUseList(&MO);
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MO = MachineOperand::CreateImm(LocalId);
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continue;
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}
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// If we see a stackified register, prepare to insert subsequent
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// get_locals before the start of its tree.
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if (MFI.isVRegStackified(OldReg)) {
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@ -301,6 +312,15 @@ bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) {
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continue;
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}
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// Our contract with inline asm register operands is to provide local
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// indices as immediates.
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if (MI.getOpcode() == TargetOpcode::INLINEASM) {
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unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
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MRI.removeRegOperandFromUseList(&MO);
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MO = MachineOperand::CreateImm(LocalId);
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continue;
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}
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// Insert a get_local.
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unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
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const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
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@ -1,4 +1,4 @@
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -no-integrated-as | FileCheck %s
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -no-integrated-as | FileCheck %s
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; Test basic inline assembly. Pass -no-integrated-as since these aren't
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; actually valid assembly syntax.
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@ -10,33 +10,24 @@ target triple = "wasm32-unknown-unknown-wasm"
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: #APP{{$}}
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; CHECK-NEXT: # $0 = aaa($0){{$}}
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; CHECK-NEXT: # 0 = aaa(0){{$}}
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; CHECK-NEXT: #NO_APP{{$}}
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; CHECK-NEXT: return $0{{$}}
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; CHECK-NEXT: get_local $push0=, 0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @foo(i32 %r) {
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entry:
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%0 = tail call i32 asm sideeffect "# $0 = aaa($1)", "=r,r"(i32 %r) #0, !srcloc !0
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ret i32 %0
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}
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; CHECK-LABEL: bar:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: #APP{{$}}
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; CHECK-NEXT: # 0($1) = bbb(0($0)){{$}}
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; CHECK-NEXT: #NO_APP{{$}}
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; CHECK-NEXT: return{{$}}
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define void @bar(i32* %r, i32* %s) {
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entry:
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tail call void asm sideeffect "# $0 = bbb($1)", "=*m,*m"(i32* %s, i32* %r) #0, !srcloc !1
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ret void
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}
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; CHECK-LABEL: imm:
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: .local i32{{$}}
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; CHECK-NEXT: #APP{{$}}
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; CHECK-NEXT: # $0 = ccc(42){{$}}
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; CHECK-NEXT: # 0 = ccc(42){{$}}
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; CHECK-NEXT: #NO_APP{{$}}
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; CHECK-NEXT: return $0{{$}}
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; CHECK-NEXT: get_local $push0=, 0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @imm() {
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entry:
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%0 = tail call i32 asm sideeffect "# $0 = ccc($1)", "=r,i"(i32 42) #0, !srcloc !2
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@ -47,9 +38,10 @@ entry:
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; CHECK-NEXT: .param i64{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: #APP{{$}}
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; CHECK-NEXT: # $0 = aaa($0){{$}}
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; CHECK-NEXT: # 0 = aaa(0){{$}}
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; CHECK-NEXT: #NO_APP{{$}}
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; CHECK-NEXT: return $0{{$}}
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; CHECK-NEXT: get_local $push0=, 0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @foo_i64(i64 %r) {
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entry:
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%0 = tail call i64 asm sideeffect "# $0 = aaa($1)", "=r,r"(i64 %r) #0, !srcloc !0
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@ -57,16 +49,20 @@ entry:
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}
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; CHECK-LABEL: X_i16:
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; CHECK: foo $1{{$}}
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; CHECK: i32.store16 0($0), $1{{$}}
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; CHECK: foo 1{{$}}
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; CHECK: get_local $push[[S0:[0-9]+]]=, 0{{$}}
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; CHECK-NEXT: get_local $push[[S1:[0-9]+]]=, 1{{$}}
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; CHECK-NEXT: i32.store16 0($pop[[S0]]), $pop[[S1]]{{$}}
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define void @X_i16(i16 * %t) {
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call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16* %t)
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ret void
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}
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; CHECK-LABEL: X_ptr:
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; CHECK: foo $1{{$}}
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; CHECK: i32.store 0($0), $1{{$}}
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; CHECK: foo 1{{$}}
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; CHECK: get_local $push[[S0:[0-9]+]]=, 0{{$}}
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; CHECK-NEXT: get_local $push[[S1:[0-9]+]]=, 1{{$}}
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; CHECK-NEXT: i32.store 0($pop[[S0]]), $pop[[S1]]{{$}}
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define void @X_ptr(i16 ** %t) {
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call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16** %t)
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ret void
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@ -87,6 +83,20 @@ define void @varname() {
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ret void
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}
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; CHECK-LABEL: r_constraint
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; CHECK: i32.const $push[[S0:[0-9]+]]=, 0{{$}}
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; CHECK-NEXT: set_local [[L0:[0-9]+]], $pop[[S0]]{{$}}
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; CHECK-NEXT: i32.const $push[[S1:[0-9]+]]=, 37{{$}}
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; CHECK-NEXT: set_local [[L1:[0-9]+]], $pop[[S1]]{{$}}
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; CHECK: foo [[L2:[0-9]+]], 1, [[L0]], [[L1]]{{$}}
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; CHECK: get_local $push{{[0-9]+}}=, [[L2]]{{$}}
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define hidden i32 @r_constraint(i32 %a, i32 %y) {
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entry:
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%z = bitcast i32 0 to i32
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%t0 = tail call i32 asm "foo $0, $1, $2, $3", "=r,r,r,r"(i32 %y, i32 %z, i32 37) #0, !srcloc !0
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ret i32 %t0
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}
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attributes #0 = { nounwind }
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!0 = !{i32 47}
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