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[CostModel][X86] Updated vXi8 and vXi16 Reverse/Alternate shuffle costs
Actual codegen is much better than the extract+insert patterns that was assumed. llvm-svn: 290962
This commit is contained in:
Simon Pilgrim
parent
3b5ff305e9
commit
f1fa399ee0
@ -645,7 +645,8 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
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{ TTI::SK_Reverse, MVT::v16i16, 2 }, // vperm2i128 + pshufb
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{ TTI::SK_Reverse, MVT::v32i8, 2 }, // vperm2i128 + pshufb
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{ TTI::SK_Alternate, MVT::v16i16, 1 } // vpblendw
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{ TTI::SK_Alternate, MVT::v16i16, 1 }, // vpblendw
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{ TTI::SK_Alternate, MVT::v32i8, 1 } // vpblendvb
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};
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if (ST->hasAVX2())
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@ -666,11 +667,8 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
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{ TTI::SK_Alternate, MVT::v4f64, 1 }, // vblendpd
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{ TTI::SK_Alternate, MVT::v8i32, 1 }, // vblendps
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{ TTI::SK_Alternate, MVT::v8f32, 1 }, // vblendps
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{ TTI::SK_Alternate, MVT::v16i16, 5 }, // 2*vextractf128 + 2*vpblendw
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// + vinsertf128
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{ TTI::SK_Alternate, MVT::v32i8, 9 } // 2*vextractf128 + 4*vpshufb
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// + 2*vpor + vinsertf128
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{ TTI::SK_Alternate, MVT::v16i16, 3 }, // vpand + vpandn + vpor
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{ TTI::SK_Alternate, MVT::v32i8, 3 } // vpand + vpandn + vpor
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};
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if (ST->hasAVX())
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@ -683,7 +681,7 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
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{ TTI::SK_Alternate, MVT::v4i32, 1 }, // pblendw
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{ TTI::SK_Alternate, MVT::v4f32, 1 }, // blendps
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{ TTI::SK_Alternate, MVT::v8i16, 1 }, // pblendw
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{ TTI::SK_Alternate, MVT::v16i8, 3 } // 2*pshufb + por
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{ TTI::SK_Alternate, MVT::v16i8, 1 } // pblendvb
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};
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if (ST->hasSSE41())
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@ -713,8 +711,8 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
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{ TTI::SK_Alternate, MVT::v2i64, 1 }, // movsd
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{ TTI::SK_Alternate, MVT::v2f64, 1 }, // movsd
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{ TTI::SK_Alternate, MVT::v4i32, 2 }, // 2*shufps
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{ TTI::SK_Alternate, MVT::v8i16, 8 }, // 4*pextrw + 4*pinsrw.
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{ TTI::SK_Alternate, MVT::v16i8, 48 }, // 8*(pinsrw + pextrw + and +movb + movzb + or)
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{ TTI::SK_Alternate, MVT::v8i16, 3 }, // pand + pandn + por
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{ TTI::SK_Alternate, MVT::v16i8, 3 } // pand + pandn + por
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};
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if (ST->hasSSE2())
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@ -722,8 +720,8 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
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return LT.first * Entry->Cost;
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static const CostTblEntry SSE1ShuffleTbl[] = {
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{ TTI::SK_Reverse, MVT::v4f32, 1 }, // shufps
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{ TTI::SK_Alternate, MVT::v4f32, 2 } // 2*shufps
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{ TTI::SK_Reverse, MVT::v4f32, 1 }, // shufps
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{ TTI::SK_Alternate, MVT::v4f32, 2 } // 2*shufps
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};
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if (ST->hasSSE1())
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@ -207,7 +207,7 @@ define <8 x i16> @test_v8i16(<8 x i16> %a, <8 x i16> %b) {
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ret <8 x i16> %1
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}
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; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i16':
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; SSE2: Cost Model: {{.*}} 8 for instruction: %1 = shufflevector
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; SSE2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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@ -219,7 +219,7 @@ define <8 x i16> @test_v8i16_2(<8 x i16> %a, <8 x i16> %b) {
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ret <8 x i16> %1
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}
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; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i16_2':
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; SSE2: Cost Model: {{.*}} 8 for instruction: %1 = shufflevector
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; SSE2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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@ -280,11 +280,11 @@ define <16 x i8> @test_v16i8(<16 x i8> %a, <16 x i8> %b) {
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ret <16 x i8> %1
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}
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; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i8':
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; SSE2: Cost Model: {{.*}} 48 for instruction: %1 = shufflevector
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; SSE2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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define <16 x i8> @test_v16i8_2(<16 x i8> %a, <16 x i8> %b) {
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@ -292,11 +292,11 @@ define <16 x i8> @test_v16i8_2(<16 x i8> %a, <16 x i8> %b) {
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ret <16 x i8> %1
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}
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; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i8_2':
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; SSE2: Cost Model: {{.*}} 48 for instruction: %1 = shufflevector
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; SSE2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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define <16 x i16> @test_v16i16(<16 x i16> %a, <16 x i16> %b) {
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@ -304,10 +304,10 @@ define <16 x i16> @test_v16i16(<16 x i16> %a, <16 x i16> %b) {
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ret <16 x i16> %1
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}
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; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i16':
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; SSE2: Cost Model: {{.*}} 16 for instruction: %1 = shufflevector
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; SSE2: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 5 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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@ -316,10 +316,10 @@ define <16 x i16> @test_v16i16_2(<16 x i16> %a, <16 x i16> %b) {
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ret <16 x i16> %1
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}
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; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i16_2':
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; SSE2: Cost Model: {{.*}} 16 for instruction: %1 = shufflevector
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; SSE2: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 5 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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define <32 x i8> @test_v32i8(<32 x i8> %a, <32 x i8> %b) {
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@ -327,11 +327,11 @@ define <32 x i8> @test_v32i8(<32 x i8> %a, <32 x i8> %b) {
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ret <32 x i8> %1
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}
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; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v32i8':
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; SSE2: Cost Model: {{.*}} 96 for instruction: %1 = shufflevector
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; SSE2: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 9 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 9 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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define <32 x i8> @test_v32i8_2(<32 x i8> %a, <32 x i8> %b) {
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@ -339,9 +339,9 @@ define <32 x i8> @test_v32i8_2(<32 x i8> %a, <32 x i8> %b) {
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ret <32 x i8> %1
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}
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; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v32i8_2':
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; SSE2: Cost Model: {{.*}} 96 for instruction: %1 = shufflevector
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; SSE2: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 9 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 9 for instruction: %1 = shufflevector
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; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector
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; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector
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; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector
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