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[InstCombine] use m_APInt to allow icmp (trunc X, Y), C folds for splat constant vectors
This is a sibling of: https://reviews.llvm.org/rL278859 https://reviews.llvm.org/rL278935 https://reviews.llvm.org/rL278945 https://reviews.llvm.org/rL279066 https://reviews.llvm.org/rL279077 https://reviews.llvm.org/rL279101 llvm-svn: 279133
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@ -1538,14 +1538,9 @@ Instruction *InstCombiner::foldICmpCstShlConst(ICmpInst &I, Value *Op, Value *A,
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Instruction *InstCombiner::foldICmpTruncConstant(ICmpInst &Cmp,
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Instruction *Trunc,
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const APInt *C) {
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// FIXME: This check restricts all folds under here to scalar types.
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ConstantInt *RHS = dyn_cast<ConstantInt>(Cmp.getOperand(1));
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if (!RHS)
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return nullptr;
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ICmpInst::Predicate Pred = Cmp.getPredicate();
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Value *X = Trunc->getOperand(0);
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if (RHS->isOne() && C->getBitWidth() > 1) {
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if (*C == 1 && C->getBitWidth() > 1) {
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// icmp slt trunc(signum(V)) 1 --> icmp slt V, 1
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Value *V = nullptr;
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if (Pred == ICmpInst::ICMP_SLT && match(X, m_Signum(m_Value(V))))
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@ -1556,8 +1551,8 @@ Instruction *InstCombiner::foldICmpTruncConstant(ICmpInst &Cmp,
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if (Cmp.isEquality() && Trunc->hasOneUse()) {
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// Simplify icmp eq (trunc x to i8), 42 -> icmp eq x, 42|highbits if all
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// of the high bits truncated out of x are known.
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unsigned DstBits = Trunc->getType()->getPrimitiveSizeInBits(),
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SrcBits = X->getType()->getPrimitiveSizeInBits();
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unsigned DstBits = Trunc->getType()->getScalarSizeInBits(),
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SrcBits = X->getType()->getScalarSizeInBits();
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APInt KnownZero(SrcBits, 0), KnownOne(SrcBits, 0);
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computeKnownBits(X, KnownZero, KnownOne, 0, &Cmp);
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@ -1566,7 +1561,7 @@ Instruction *InstCombiner::foldICmpTruncConstant(ICmpInst &Cmp,
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// Pull in the high bits from known-ones set.
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APInt NewRHS = C->zext(SrcBits);
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NewRHS |= KnownOne & APInt::getHighBitsSet(SrcBits, SrcBits - DstBits);
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return new ICmpInst(Pred, X, Builder->getInt(NewRHS));
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return new ICmpInst(Pred, X, ConstantInt::get(X->getType(), NewRHS));
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}
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}
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@ -356,7 +356,7 @@ define i1 @test31(i64 %A) {
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ret i1 %D
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}
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; FIXME: Vectors should fold too...or not?
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; FIXME: Vectors should fold too...or not?
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; Does this depend on the whether the source/dest types of the trunc are legal in the data layout?
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define <2 x i1> @test31vec(<2 x i64> %A) {
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; CHECK-LABEL: @test31vec(
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@ -414,12 +414,11 @@ define i1 @test36(i32 %a) {
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ret i1 %d
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}
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; FIXME: Vectors should fold too.
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; FIXME: The trunc is removed, but the icmp+lshr fold is missing.
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define <2 x i1> @test36vec(<2 x i32> %a) {
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; CHECK-LABEL: @test36vec(
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; CHECK-NEXT: [[B:%.*]] = lshr <2 x i32> %a, <i32 31, i32 31>
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; CHECK-NEXT: [[C:%.*]] = trunc <2 x i32> [[B]] to <2 x i8>
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; CHECK-NEXT: [[D:%.*]] = icmp eq <2 x i8> [[C]], zeroinitializer
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; CHECK-NEXT: [[D:%.*]] = icmp eq <2 x i32> [[B]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%b = lshr <2 x i32> %a, <i32 31, i32 31>
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@ -107,15 +107,9 @@ define i1 @test4c(i64 %a) {
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ret i1 %c
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}
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; FIXME: Vectors should fold too.
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define <2 x i1> @test4c_vec(<2 x i64> %a) {
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; CHECK-LABEL: @test4c_vec(
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; CHECK-NEXT: [[L:%.*]] = ashr <2 x i64> %a, <i64 63, i64 63>
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; CHECK-NEXT: [[NA:%.*]] = sub <2 x i64> zeroinitializer, %a
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; CHECK-NEXT: [[R:%.*]] = lshr <2 x i64> [[NA]], <i64 63, i64 63>
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; CHECK-NEXT: [[SIGNUM:%.*]] = or <2 x i64> [[L]], [[R]]
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; CHECK-NEXT: [[SIGNUM_TRUNC:%.*]] = trunc <2 x i64> [[SIGNUM]] to <2 x i32>
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; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> [[SIGNUM_TRUNC]], <i32 1, i32 1>
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; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i64> %a, <i64 1, i64 1>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%l = ashr <2 x i64> %a, <i64 63, i64 63>
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