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[COFF, ARM64] Implement Intrinsic.sponentry for AArch64
Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform. Patch by: Yin Ma (yinma@codeaurora.org) Reviewers: mgrang, ssijaric, eli.friedman, TomTan, mstorsjo, rnk, compnerd, efriedma Reviewed By: efriedma Subscribers: efriedma, javed.absar, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D53996 llvm-svn: 345909
This commit is contained in:
Mandeep Singh Grang
parent
1557b354d7
commit
f318e7e734
@ -2926,7 +2926,7 @@ Simple Constants
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hexadecimal notation (see below). The assembler requires the exact
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decimal value of a floating-point constant. For example, the
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assembler accepts 1.25 but rejects 1.3 because 1.3 is a repeating
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decimal in binary. Floating-point constants must have a
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decimal in binary. Floating-point constants must have a
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:ref:`floating-point <t_floating>` type.
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**Null pointer constants**
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The identifier '``null``' is recognized as a null pointer constant
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@ -3331,7 +3331,7 @@ The following is the syntax for constant expressions:
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value won't fit in the integer type, the result is a
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:ref:`poison value <poisonvalues>`.
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``uitofp (CST to TYPE)``
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Convert an unsigned integer constant to the corresponding
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Convert an unsigned integer constant to the corresponding
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floating-point constant. TYPE must be a scalar or vector floating-point
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type. CST must be of scalar or vector integer type. Both CST and TYPE must
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be scalars, or vectors of the same number of elements.
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@ -5434,7 +5434,7 @@ Irreducible loop header weights are typically based on profile data.
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'``invariant.group``' Metadata
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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The experimental ``invariant.group`` metadata may be attached to
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The experimental ``invariant.group`` metadata may be attached to
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``load``/``store`` instructions referencing a single metadata with no entries.
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The existence of the ``invariant.group`` metadata on the instruction tells
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the optimizer that every ``load`` and ``store`` to the same pointer operand
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@ -6875,7 +6875,7 @@ Arguments:
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""""""""""
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The two arguments to the '``fadd``' instruction must be
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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floating-point values. Both arguments must have identical types.
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Semantics:
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@ -6883,7 +6883,7 @@ Semantics:
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The value produced is the floating-point sum of the two operands.
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This instruction is assumed to execute in the default :ref:`floating-point
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environment <floatenv>`.
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environment <floatenv>`.
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This instruction can also take any number of :ref:`fast-math
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flags <fastmath>`, which are optimization hints to enable otherwise
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unsafe floating-point optimizations:
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@ -6972,7 +6972,7 @@ Arguments:
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""""""""""
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The two arguments to the '``fsub``' instruction must be
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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floating-point values. Both arguments must have identical types.
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Semantics:
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@ -6980,7 +6980,7 @@ Semantics:
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The value produced is the floating-point difference of the two operands.
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This instruction is assumed to execute in the default :ref:`floating-point
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environment <floatenv>`.
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environment <floatenv>`.
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This instruction can also take any number of :ref:`fast-math
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flags <fastmath>`, which are optimization hints to enable otherwise
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unsafe floating-point optimizations:
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@ -7067,7 +7067,7 @@ Arguments:
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""""""""""
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The two arguments to the '``fmul``' instruction must be
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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floating-point values. Both arguments must have identical types.
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Semantics:
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@ -7075,7 +7075,7 @@ Semantics:
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The value produced is the floating-point product of the two operands.
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This instruction is assumed to execute in the default :ref:`floating-point
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environment <floatenv>`.
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environment <floatenv>`.
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This instruction can also take any number of :ref:`fast-math
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flags <fastmath>`, which are optimization hints to enable otherwise
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unsafe floating-point optimizations:
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@ -7201,7 +7201,7 @@ Arguments:
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""""""""""
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The two arguments to the '``fdiv``' instruction must be
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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floating-point values. Both arguments must have identical types.
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Semantics:
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@ -7209,7 +7209,7 @@ Semantics:
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The value produced is the floating-point quotient of the two operands.
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This instruction is assumed to execute in the default :ref:`floating-point
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environment <floatenv>`.
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environment <floatenv>`.
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This instruction can also take any number of :ref:`fast-math
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flags <fastmath>`, which are optimization hints to enable otherwise
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unsafe floating-point optimizations:
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@ -7344,7 +7344,7 @@ Arguments:
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""""""""""
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The two arguments to the '``frem``' instruction must be
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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:ref:`floating-point <t_floating>` or :ref:`vector <t_vector>` of
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floating-point values. Both arguments must have identical types.
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Semantics:
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@ -7352,10 +7352,10 @@ Semantics:
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The value produced is the floating-point remainder of the two operands.
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This is the same output as a libm '``fmod``' function, but without any
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possibility of setting ``errno``. The remainder has the same sign as the
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possibility of setting ``errno``. The remainder has the same sign as the
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dividend.
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This instruction is assumed to execute in the default :ref:`floating-point
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environment <floatenv>`.
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environment <floatenv>`.
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This instruction can also take any number of :ref:`fast-math
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flags <fastmath>`, which are optimization hints to enable otherwise
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unsafe floating-point optimizations:
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@ -8809,7 +8809,7 @@ Semantics:
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The '``fptrunc``' instruction casts a ``value`` from a larger
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:ref:`floating-point <t_floating>` type to a smaller :ref:`floating-point
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<t_floating>` type.
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<t_floating>` type.
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This instruction is assumed to execute in the default :ref:`floating-point
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environment <floatenv>`.
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@ -10330,6 +10330,27 @@ of the obvious source-language caller.
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This intrinsic is only implemented for x86 and aarch64.
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'``llvm.sponentry``' Intrinsic
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Syntax:
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"""""""
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::
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declare i8* @llvm.sponentry()
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Overview:
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"""""""""
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The '``llvm.sponentry``' intrinsic returns the stack pointer value at
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the entry of the current function calling this intrinsic.
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Semantics:
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""""""""""
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Note this intrinsic is only verified on AArch64.
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'``llvm.frameaddress``' Intrinsic
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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@ -12115,11 +12136,11 @@ Overview:
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The '``llvm.fshl``' family of intrinsic functions performs a funnel shift left:
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the first two values are concatenated as { %a : %b } (%a is the most significant
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bits of the wide value), the combined value is shifted left, and the most
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significant bits are extracted to produce a result that is the same size as the
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original arguments. If the first 2 arguments are identical, this is equivalent
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to a rotate left operation. For vector types, the operation occurs for each
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element of the vector. The shift argument is treated as an unsigned amount
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bits of the wide value), the combined value is shifted left, and the most
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significant bits are extracted to produce a result that is the same size as the
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original arguments. If the first 2 arguments are identical, this is equivalent
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to a rotate left operation. For vector types, the operation occurs for each
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element of the vector. The shift argument is treated as an unsigned amount
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modulo the element size of the arguments.
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Arguments:
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@ -12161,11 +12182,11 @@ Overview:
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The '``llvm.fshr``' family of intrinsic functions performs a funnel shift right:
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the first two values are concatenated as { %a : %b } (%a is the most significant
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bits of the wide value), the combined value is shifted right, and the least
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significant bits are extracted to produce a result that is the same size as the
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original arguments. If the first 2 arguments are identical, this is equivalent
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to a rotate right operation. For vector types, the operation occurs for each
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element of the vector. The shift argument is treated as an unsigned amount
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bits of the wide value), the combined value is shifted right, and the least
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significant bits are extracted to produce a result that is the same size as the
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original arguments. If the first 2 arguments are identical, this is equivalent
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to a rotate right operation. For vector types, the operation occurs for each
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element of the vector. The shift argument is treated as an unsigned amount
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modulo the element size of the arguments.
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Arguments:
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@ -13446,7 +13467,7 @@ The '``llvm.masked.expandload``' intrinsic is designed for reading multiple scal
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%Tmp = call <8 x double> @llvm.masked.expandload.v8f64(double* %Bptr, <8 x i1> %Mask, <8 x double> undef)
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; Store the result in A
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call void @llvm.masked.store.v8f64.p0v8f64(<8 x double> %Tmp, <8 x double>* %Aptr, i32 8, <8 x i1> %Mask)
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; %Bptr should be increased on each iteration according to the number of '1' elements in the Mask.
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%MaskI = bitcast <8 x i1> %Mask to i8
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%MaskIPopcnt = call i8 @llvm.ctpop.i8(i8 %MaskI)
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@ -13503,7 +13524,7 @@ The '``llvm.masked.compressstore``' intrinsic is designed for compressing data i
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%Tmp = call <8 x double> @llvm.masked.load.v8f64.p0v8f64(<8 x double>* %Aptr, i32 8, <8 x i1> %Mask, <8 x double> undef)
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; Store all selected elements consecutively in array B
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call <void> @llvm.masked.compressstore.v8f64(<8 x double> %Tmp, double* %Bptr, <8 x i1> %Mask)
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; %Bptr should be increased on each iteration according to the number of '1' elements in the Mask.
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%MaskI = bitcast <8 x i1> %Mask to i8
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%MaskIPopcnt = call i8 @llvm.ctpop.i8(i8 %MaskI)
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@ -14136,7 +14157,7 @@ Overview:
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The '``llvm.experimental.constrained.powi``' intrinsic returns the first operand
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raised to the (positive or negative) power specified by the second operand. The
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order of evaluation of multiplications is not defined. When a vector of
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order of evaluation of multiplications is not defined. When a vector of
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floating-point type is used, the second argument remains a scalar integer value.
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@ -14462,7 +14483,7 @@ Overview:
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"""""""""
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The '``llvm.experimental.constrained.nearbyint``' intrinsic returns the first
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operand rounded to the nearest integer. It will not raise an inexact
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operand rounded to the nearest integer. It will not raise an inexact
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floating-point exception if the operand is not an integer.
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@ -70,7 +70,7 @@ namespace ISD {
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/// of the frame or return address to return. An index of zero corresponds
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/// to the current function's frame or return address, an index of one to
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/// the parent's frame or return address, and so on.
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FRAMEADDR, RETURNADDR, ADDROFRETURNADDR,
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FRAMEADDR, RETURNADDR, ADDROFRETURNADDR, SPONENTRY,
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/// LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
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/// Materializes the offset from the local object pointer of another
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@ -320,6 +320,7 @@ def int_gcwrite : Intrinsic<[],
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def int_returnaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
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def int_addressofreturnaddress : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
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def int_frameaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
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def int_sponentry : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
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def int_read_register : Intrinsic<[llvm_anyint_ty], [llvm_metadata_ty],
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[IntrReadMem], "llvm.read_register">;
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def int_write_register : Intrinsic<[], [llvm_metadata_ty, llvm_anyint_ty],
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@ -1059,6 +1059,7 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
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case ISD::FRAMEADDR:
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case ISD::RETURNADDR:
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case ISD::ADDROFRETURNADDR:
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case ISD::SPONENTRY:
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// These operations lie about being legal: when they claim to be legal,
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// they should actually be custom-lowered.
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Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
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@ -5050,6 +5050,10 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
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setValue(&I, DAG.getNode(ISD::ADDROFRETURNADDR, sdl,
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TLI.getPointerTy(DAG.getDataLayout())));
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return nullptr;
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case Intrinsic::sponentry:
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setValue(&I, DAG.getNode(ISD::SPONENTRY, sdl,
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TLI.getPointerTy(DAG.getDataLayout())));
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return nullptr;
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case Intrinsic::frameaddress:
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setValue(&I, DAG.getNode(ISD::FRAMEADDR, sdl,
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TLI.getPointerTy(DAG.getDataLayout()),
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@ -124,6 +124,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
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case ISD::RETURNADDR: return "RETURNADDR";
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case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
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case ISD::FRAMEADDR: return "FRAMEADDR";
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case ISD::SPONENTRY: return "SPONENTRY";
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case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
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case ISD::READ_REGISTER: return "READ_REGISTER";
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case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
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@ -3450,6 +3450,21 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
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updateValueMap(II, SrcReg);
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return true;
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}
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case Intrinsic::sponentry: {
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MachineFrameInfo &MFI = FuncInfo.MF->getFrameInfo();
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// SP = FP + Fixed Object + 16
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int FI = MFI.CreateFixedObject(4, 0, false);
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unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass);
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
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TII.get(AArch64::ADDXri), ResultReg)
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.addFrameIndex(FI)
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.addImm(0)
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.addImm(0);
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updateValueMap(II, ResultReg);
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return true;
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}
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case Intrinsic::memcpy:
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case Intrinsic::memmove: {
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const auto *MTI = cast<MemTransferInst>(II);
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@ -2863,6 +2863,8 @@ SDValue AArch64TargetLowering::LowerOperation(SDValue Op,
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return LowerFP_EXTEND(Op, DAG);
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case ISD::FRAMEADDR:
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return LowerFRAMEADDR(Op, DAG);
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case ISD::SPONENTRY:
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return LowerSPONENTRY(Op, DAG);
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case ISD::RETURNADDR:
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return LowerRETURNADDR(Op, DAG);
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case ISD::ADDROFRETURNADDR:
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@ -5173,6 +5175,16 @@ SDValue AArch64TargetLowering::LowerFRAMEADDR(SDValue Op,
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return FrameAddr;
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}
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SDValue AArch64TargetLowering::LowerSPONENTRY(SDValue Op,
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SelectionDAG &DAG) const {
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MachineFrameInfo &MFI = DAG.getMachineFunction().getFrameInfo();
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EVT VT = getPointerTy(DAG.getDataLayout());
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SDLoc DL(Op);
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int FI = MFI.CreateFixedObject(4, 0, false);
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return DAG.getFrameIndex(FI, VT);
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}
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// FIXME? Maybe this could be a TableGen attribute on some registers and
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// this table could be generated automatically from RegInfo.
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unsigned AArch64TargetLowering::getRegisterByName(const char* RegName, EVT VT,
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@ -617,6 +617,7 @@ private:
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SDValue LowerVACOPY(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerSPONENTRY(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
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104
test/CodeGen/AArch64/sponentry.ll
Normal file
104
test/CodeGen/AArch64/sponentry.ll
Normal file
@ -0,0 +1,104 @@
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; RUN: llc -mtriple=aarch64-windows-msvc -disable-fp-elim %s -o - | FileCheck %s
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; RUN: llc -mtriple=aarch64-windows-msvc -fast-isel -disable-fp-elim %s -o - | FileCheck %s
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; RUN: llc -mtriple=aarch64-windows-msvc %s -o - | FileCheck %s --check-prefix=NOFP
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; RUN: llc -mtriple=aarch64-windows-msvc -fast-isel %s -o - | FileCheck %s --check-prefix=NOFP
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@env2 = common dso_local global [24 x i64]* null, align 8
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define dso_local void @bar() {
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%1 = call i8* @llvm.sponentry()
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%2 = load [24 x i64]*, [24 x i64]** @env2, align 8
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%3 = getelementptr inbounds [24 x i64], [24 x i64]* %2, i32 0, i32 0
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%4 = bitcast i64* %3 to i8*
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%5 = call i32 @_setjmpex(i8* %4, i8* %1) #2
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ret void
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}
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; CHECK: bar:
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; CHECK: mov x29, sp
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; CHECK: add x1, x29, #16
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; CEHCK: bl _setjmpex
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; NOFP: str x30, [sp, #-16]!
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; NOFP: add x1, sp, #16
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define dso_local void @foo([24 x i64]*) {
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%2 = alloca [24 x i64]*, align 8
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%3 = alloca i32, align 4
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%4 = alloca [100 x i32], align 4
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store [24 x i64]* %0, [24 x i64]** %2, align 8
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%5 = call i8* @llvm.sponentry()
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%6 = load [24 x i64]*, [24 x i64]** %2, align 8
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%7 = getelementptr inbounds [24 x i64], [24 x i64]* %6, i32 0, i32 0
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%8 = bitcast i64* %7 to i8*
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%9 = call i32 @_setjmpex(i8* %8, i8* %5)
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store i32 %9, i32* %3, align 4
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ret void
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}
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; CHECK: foo:
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; CHECK: sub sp, sp, #448
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; CHECK: add x29, sp, #432
|
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; CHECK: add x1, x29, #16
|
||||
; CEHCK: bl _setjmpex
|
||||
|
||||
; NOFP: sub sp, sp, #432
|
||||
; NOFP: add x1, sp, #432
|
||||
|
||||
define dso_local void @var_args(i8*, ...) {
|
||||
%2 = alloca i8*, align 8
|
||||
%3 = alloca i8*, align 8
|
||||
store i8* %0, i8** %2, align 8
|
||||
%4 = bitcast i8** %3 to i8*
|
||||
call void @llvm.va_start(i8* %4)
|
||||
%5 = load i8*, i8** %3, align 8
|
||||
%6 = getelementptr inbounds i8, i8* %5, i64 8
|
||||
store i8* %6, i8** %3, align 8
|
||||
%7 = bitcast i8* %5 to i32*
|
||||
%8 = load i32, i32* %7, align 8
|
||||
%9 = bitcast i8** %3 to i8*
|
||||
call void @llvm.va_end(i8* %9)
|
||||
%10 = call i8* @llvm.sponentry()
|
||||
%11 = load [24 x i64]*, [24 x i64]** @env2, align 8
|
||||
%12 = getelementptr inbounds [24 x i64], [24 x i64]* %11, i32 0, i32 0
|
||||
%13 = bitcast i64* %12 to i8*
|
||||
%14 = call i32 @_setjmpex(i8* %13, i8* %10) #3
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK: var_args:
|
||||
; CHECK: sub sp, sp, #96
|
||||
; CHECK: add x29, sp, #16
|
||||
; CHECK: add x1, x29, #80
|
||||
; CEHCK: bl _setjmpex
|
||||
|
||||
; NOFP: sub sp, sp, #96
|
||||
; NOFP: add x1, sp, #96
|
||||
|
||||
define dso_local void @manyargs(i64 %x1, i64 %x2, i64 %x3, i64 %x4, i64 %x5, i64 %x6, i64 %x7, i64 %x8, i64 %x9, i64 %x10) {
|
||||
%1 = call i8* @llvm.sponentry()
|
||||
%2 = load [24 x i64]*, [24 x i64]** @env2, align 8
|
||||
%3 = getelementptr inbounds [24 x i64], [24 x i64]* %2, i32 0, i32 0
|
||||
%4 = bitcast i64* %3 to i8*
|
||||
%5 = call i32 @_setjmpex(i8* %4, i8* %1) #2
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK: manyargs:
|
||||
; CHECK: stp x29, x30, [sp, #-16]!
|
||||
; CHECK: add x1, x29, #16
|
||||
|
||||
; NOFP: str x30, [sp, #-16]!
|
||||
; NOFP: add x1, sp, #16
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
declare i8* @llvm.sponentry()
|
||||
|
||||
; Function Attrs: returns_twice
|
||||
declare dso_local i32 @_setjmpex(i8*, i8*)
|
||||
|
||||
; Function Attrs: nounwind
|
||||
declare void @llvm.va_start(i8*) #1
|
||||
|
||||
; Function Attrs: nounwind
|
||||
declare void @llvm.va_end(i8*) #1
|
||||
Loading…
Reference in New Issue
Block a user