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[NFC] Use [MC]Register

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Differential Revision: https://reviews.llvm.org/D90795
This commit is contained in:
Mircea Trofin 2020-11-04 13:28:13 -08:00
parent db12888eec
commit f31e5eac67
4 changed files with 13 additions and 9 deletions
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6
lib/Target/AMDGPU/SIRegisterInfo.cpp
View File

@ -61,7 +61,8 @@ SIRegisterInfo::SIRegisterInfo(const GCNSubtarget &ST)
"getNumCoveredRegs() will not work with generated subreg masks!");
RegPressureIgnoredUnits.resize(getNumRegUnits());
RegPressureIgnoredUnits.set(*MCRegUnitIterator(AMDGPU::M0, this));
RegPressureIgnoredUnits.set(
*MCRegUnitIterator(MCRegister::from(AMDGPU::M0), this));
for (auto Reg : AMDGPU::VGPR_HI16RegClass)
RegPressureIgnoredUnits.set(*MCRegUnitIterator(Reg, this));
@ -2093,7 +2094,8 @@ MachineInstr *SIRegisterInfo::findReachingDef(Register Reg, unsigned SubReg,
DefIdx = V->def;
} else {
// Find last def.
for (MCRegUnitIterator Units(Reg, this); Units.isValid(); ++Units) {
for (MCRegUnitIterator Units(Reg.asMCReg(), this); Units.isValid();
++Units) {
LiveRange &LR = LIS->getRegUnit(*Units);
if (VNInfo *V = LR.getVNInfoAt(UseIdx)) {
if (!DefIdx.isValid() ||

8
lib/Target/AMDGPU/SIWholeQuadMode.cpp
View File

@ -353,7 +353,8 @@ void SIWholeQuadMode::markInstructionUses(const MachineInstr &MI, char Flag,
if (Reg == AMDGPU::EXEC || Reg == AMDGPU::EXEC_LO)
continue;
for (MCRegUnitIterator RegUnit(Reg, TRI); RegUnit.isValid(); ++RegUnit) {
for (MCRegUnitIterator RegUnit(Reg.asMCReg(), TRI); RegUnit.isValid();
++RegUnit) {
LiveRange &LR = LIS->getRegUnit(*RegUnit);
const VNInfo *Value = LR.Query(LIS->getInstructionIndex(MI)).valueIn();
if (!Value)
@ -630,7 +631,8 @@ MachineBasicBlock::iterator SIWholeQuadMode::prepareInsertion(
if (!SaveSCC)
return PreferLast ? Last : First;
LiveRange &LR = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::SCC, TRI));
LiveRange &LR =
LIS->getRegUnit(*MCRegUnitIterator(MCRegister::from(AMDGPU::SCC), TRI));
auto MBBE = MBB.end();
SlotIndex FirstIdx = First != MBBE ? LIS->getInstructionIndex(*First)
: LIS->getMBBEndIdx(&MBB);
@ -1062,7 +1064,7 @@ bool SIWholeQuadMode::runOnMachineFunction(MachineFunction &MF) {
// Physical registers like SCC aren't tracked by default anyway, so just
// removing the ranges we computed is the simplest option for maintaining
// the analysis results.
LIS->removeRegUnit(*MCRegUnitIterator(AMDGPU::SCC, TRI));
LIS->removeRegUnit(*MCRegUnitIterator(MCRegister::from(AMDGPU::SCC), TRI));
return true;
}

6
lib/Target/PowerPC/PPCVSXFMAMutate.cpp
View File

@ -315,9 +315,9 @@ protected:
// Extend the live interval of the addend source (it might end at the
// copy to be removed, or somewhere in between there and here). This
// is necessary only if it is a physical register.
if (!Register::isVirtualRegister(AddendSrcReg))
for (MCRegUnitIterator Units(AddendSrcReg, TRI); Units.isValid();
++Units) {
if (!AddendSrcReg.isVirtual())
for (MCRegUnitIterator Units(AddendSrcReg.asMCReg(), TRI);
Units.isValid(); ++Units) {
unsigned Unit = *Units;
LiveRange &AddendSrcRange = LIS->getRegUnit(Unit);

2
lib/Target/SystemZ/SystemZInstrInfo.cpp
View File

@ -999,7 +999,7 @@ MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
unsigned Opcode = MI.getOpcode();
// Check CC liveness if new instruction introduces a dead def of CC.
MCRegUnitIterator CCUnit(SystemZ::CC, TRI);
MCRegUnitIterator CCUnit(MCRegister::from(SystemZ::CC), TRI);
SlotIndex MISlot = SlotIndex();
LiveRange *CCLiveRange = nullptr;
bool CCLiveAtMI = true;