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[DAGCombine] (add X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)

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Summary: Common pattern when legalizing large integers operations. Similar to D32687, when the carry isn't used.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Differential Revision: https://reviews.llvm.org/D32738

llvm-svn: 301919
This commit is contained in:
Amaury Sechet 2017-05-02 13:34:25 +00:00
parent eeb3d91caf
commit f3c58692f2
2 changed files with 14 additions and 11 deletions
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5
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -2015,6 +2015,11 @@ SDValue DAGCombiner::visitADDLike(SDValue N0, SDValue N1, SDNode *LocReference)
}
}
// (add X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1)))
return DAG.getNode(ISD::ADDCARRY, DL, N1->getVTList(),
N0, N1.getOperand(0), N1.getOperand(2));
return SDValue();
}

20
test/CodeGen/X86/adde-carry.ll
View File

@ -47,7 +47,7 @@ define void @c(i16* nocapture %r, i64 %a, i64 %b, i16 %c) nounwind {
; CHECK-LABEL: c:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: addq %rdx, %rsi
; CHECK-NEXT: adcl $0, %ecx
; CHECK-NEXT: adcw $0, %cx
; CHECK-NEXT: movw %cx, (%rdi)
; CHECK-NEXT: retq
entry:
@ -66,7 +66,7 @@ define void @d(i8* nocapture %r, i64 %a, i64 %b, i8 %c) nounwind {
; CHECK-LABEL: d:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: addq %rdx, %rsi
; CHECK-NEXT: adcl $0, %ecx
; CHECK-NEXT: adcb $0, %cl
; CHECK-NEXT: movb %cl, (%rdi)
; CHECK-NEXT: retq
entry:
@ -90,17 +90,16 @@ define %scalar @pr31719(%scalar* nocapture readonly %this, %scalar %arg.b) {
; CHECK-NEXT: sbbq %r10, %r10
; CHECK-NEXT: andl $1, %r10d
; CHECK-NEXT: addq 8(%rsi), %rcx
; CHECK-NEXT: sbbq %r11, %r11
; CHECK-NEXT: andl $1, %r11d
; CHECK-NEXT: addq %r10, %rcx
; CHECK-NEXT: adcq $0, %r11
; CHECK-NEXT: addq 16(%rsi), %r8
; CHECK-NEXT: sbbq %rax, %rax
; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: addq %r11, %r8
; CHECK-NEXT: addq %r10, %rcx
; CHECK-NEXT: adcq $0, %rax
; CHECK-NEXT: addq 16(%rsi), %r8
; CHECK-NEXT: sbbq %r10, %r10
; CHECK-NEXT: andl $1, %r10d
; CHECK-NEXT: addq 24(%rsi), %r9
; CHECK-NEXT: addq %rax, %r9
; CHECK-NEXT: addq %rax, %r8
; CHECK-NEXT: adcq %r10, %r9
; CHECK-NEXT: movq %rdx, (%rdi)
; CHECK-NEXT: movq %rcx, 8(%rdi)
; CHECK-NEXT: movq %r8, 16(%rdi)
@ -163,8 +162,7 @@ define void @muladd(%accumulator* nocapture %this, i64 %arg.a, i64 %arg.b) {
; CHECK-NEXT: movq %rax, (%rdi)
; CHECK-NEXT: addq 8(%rdi), %rdx
; CHECK-NEXT: movq %rdx, 8(%rdi)
; CHECK-NEXT: sbbl %eax, %eax
; CHECK-NEXT: subl %eax, 16(%rdi)
; CHECK-NEXT: adcl $0, 16(%rdi)
; CHECK-NEXT: retq
entry:
%0 = zext i64 %arg.a to i128