mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-31 12:41:49 +01:00
[TableGen] Pull the increment of a variable out of an assert.
The variable is only used by the assert so the code was fine before, but it was flagged in PR47072.
This commit is contained in:
parent
fc9284d5ff
commit
f4233be412
@ -1288,7 +1288,8 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
|
||||
OS << CGH.getMode(M).Name;
|
||||
OS << ")\n";
|
||||
for (const auto &RC : RegisterClasses) {
|
||||
assert(RC.EnumValue == EV++ && "Unexpected order of register classes");
|
||||
assert(RC.EnumValue == EV && "Unexpected order of register classes");
|
||||
++EV;
|
||||
(void)EV;
|
||||
const RegSizeInfo &RI = RC.RSI.get(M);
|
||||
OS << " { " << RI.RegSize << ", " << RI.SpillSize << ", "
|
||||
|
Loading…
x
Reference in New Issue
Block a user