mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 03:02:36 +01:00
[InstCombine] Improve the expansion in SimplifyUsingDistributiveLaws to handle cases where one side doesn't simplify, but the other side resolves to an identity value
Summary: If one side simplifies to the identity value for inner opcode, we can replace the value with just the operation that can't be simplified. I've removed a couple now unneeded special cases in visitAnd and visitOr. There are probably other cases I missed. Reviewers: spatel, majnemer, hfinkel, dberlin Reviewed By: spatel Subscribers: grandinj, llvm-commits, spatel Differential Revision: https://reviews.llvm.org/D35451 llvm-svn: 308111
This commit is contained in:
parent
a6d8f025c0
commit
f47536e576
@ -1414,12 +1414,6 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) {
|
||||
}
|
||||
}
|
||||
|
||||
// (A&((~A)|B)) -> A&B
|
||||
if (match(Op0, m_c_Or(m_Not(m_Specific(Op1)), m_Value(A))))
|
||||
return BinaryOperator::CreateAnd(A, Op1);
|
||||
if (match(Op1, m_c_Or(m_Not(m_Specific(Op0)), m_Value(A))))
|
||||
return BinaryOperator::CreateAnd(A, Op0);
|
||||
|
||||
// (A ^ B) & ((B ^ C) ^ A) -> (A ^ B) & ~C
|
||||
if (match(Op0, m_Xor(m_Value(A), m_Value(B))))
|
||||
if (match(Op1, m_Xor(m_Xor(m_Specific(B), m_Value(C)), m_Specific(A))))
|
||||
@ -2017,18 +2011,6 @@ Instruction *InstCombiner::visitOr(BinaryOperator &I) {
|
||||
|
||||
Value *A, *B;
|
||||
|
||||
// ((~A & B) | A) -> (A | B)
|
||||
if (match(Op0, m_c_And(m_Not(m_Specific(Op1)), m_Value(A))))
|
||||
return BinaryOperator::CreateOr(A, Op1);
|
||||
if (match(Op1, m_c_And(m_Not(m_Specific(Op0)), m_Value(A))))
|
||||
return BinaryOperator::CreateOr(Op0, A);
|
||||
|
||||
// ((A & B) | ~A) -> (~A | B)
|
||||
// The NOT is guaranteed to be in the RHS by complexity ordering.
|
||||
if (match(Op1, m_Not(m_Value(A))) &&
|
||||
match(Op0, m_c_And(m_Specific(A), m_Value(B))))
|
||||
return BinaryOperator::CreateOr(Op1, B);
|
||||
|
||||
// (A & C)|(B & D)
|
||||
Value *C = nullptr, *D = nullptr;
|
||||
if (match(Op0, m_And(m_Value(A), m_Value(C))) &&
|
||||
|
@ -636,17 +636,35 @@ Value *InstCombiner::SimplifyUsingDistributiveLaws(BinaryOperator &I) {
|
||||
Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS;
|
||||
Instruction::BinaryOps InnerOpcode = Op0->getOpcode(); // op'
|
||||
|
||||
Value *L = SimplifyBinOp(TopLevelOpcode, A, C, SQ.getWithInstruction(&I));
|
||||
Value *R = SimplifyBinOp(TopLevelOpcode, B, C, SQ.getWithInstruction(&I));
|
||||
|
||||
// Do "A op C" and "B op C" both simplify?
|
||||
if (Value *L =
|
||||
SimplifyBinOp(TopLevelOpcode, A, C, SQ.getWithInstruction(&I)))
|
||||
if (Value *R =
|
||||
SimplifyBinOp(TopLevelOpcode, B, C, SQ.getWithInstruction(&I))) {
|
||||
// They do! Return "L op' R".
|
||||
++NumExpand;
|
||||
C = Builder.CreateBinOp(InnerOpcode, L, R);
|
||||
C->takeName(&I);
|
||||
return C;
|
||||
}
|
||||
if (L && R) {
|
||||
// They do! Return "L op' R".
|
||||
++NumExpand;
|
||||
C = Builder.CreateBinOp(InnerOpcode, L, R);
|
||||
C->takeName(&I);
|
||||
return C;
|
||||
}
|
||||
|
||||
// Does "A op C" simplify to the identity value for the inner opcode?
|
||||
if (L && L == ConstantExpr::getBinOpIdentity(InnerOpcode, L->getType())) {
|
||||
// They do! Return "B op C".
|
||||
++NumExpand;
|
||||
C = Builder.CreateBinOp(TopLevelOpcode, B, C);
|
||||
C->takeName(&I);
|
||||
return C;
|
||||
}
|
||||
|
||||
// Does "B op C" simplify to the identity value for the inner opcode?
|
||||
if (R && R == ConstantExpr::getBinOpIdentity(InnerOpcode, R->getType())) {
|
||||
// They do! Return "A op C".
|
||||
++NumExpand;
|
||||
C = Builder.CreateBinOp(TopLevelOpcode, A, C);
|
||||
C->takeName(&I);
|
||||
return C;
|
||||
}
|
||||
}
|
||||
|
||||
if (Op1 && LeftDistributesOverRight(TopLevelOpcode, Op1->getOpcode())) {
|
||||
@ -655,17 +673,35 @@ Value *InstCombiner::SimplifyUsingDistributiveLaws(BinaryOperator &I) {
|
||||
Value *A = LHS, *B = Op1->getOperand(0), *C = Op1->getOperand(1);
|
||||
Instruction::BinaryOps InnerOpcode = Op1->getOpcode(); // op'
|
||||
|
||||
Value *L = SimplifyBinOp(TopLevelOpcode, A, B, SQ.getWithInstruction(&I));
|
||||
Value *R = SimplifyBinOp(TopLevelOpcode, A, C, SQ.getWithInstruction(&I));
|
||||
|
||||
// Do "A op B" and "A op C" both simplify?
|
||||
if (Value *L =
|
||||
SimplifyBinOp(TopLevelOpcode, A, B, SQ.getWithInstruction(&I)))
|
||||
if (Value *R =
|
||||
SimplifyBinOp(TopLevelOpcode, A, C, SQ.getWithInstruction(&I))) {
|
||||
// They do! Return "L op' R".
|
||||
++NumExpand;
|
||||
A = Builder.CreateBinOp(InnerOpcode, L, R);
|
||||
A->takeName(&I);
|
||||
return A;
|
||||
}
|
||||
if (L && R) {
|
||||
// They do! Return "L op' R".
|
||||
++NumExpand;
|
||||
A = Builder.CreateBinOp(InnerOpcode, L, R);
|
||||
A->takeName(&I);
|
||||
return A;
|
||||
}
|
||||
|
||||
// Does "A op B" simplify to the identity value for the inner opcode?
|
||||
if (L && L == ConstantExpr::getBinOpIdentity(InnerOpcode, L->getType())) {
|
||||
// They do! Return "A op C".
|
||||
++NumExpand;
|
||||
A = Builder.CreateBinOp(TopLevelOpcode, A, C);
|
||||
A->takeName(&I);
|
||||
return A;
|
||||
}
|
||||
|
||||
// Does "A op C" simplify to the identity value for the inner opcode?
|
||||
if (R && R == ConstantExpr::getBinOpIdentity(InnerOpcode, R->getType())) {
|
||||
// They do! Return "A op B".
|
||||
++NumExpand;
|
||||
A = Builder.CreateBinOp(TopLevelOpcode, A, B);
|
||||
A->takeName(&I);
|
||||
return A;
|
||||
}
|
||||
}
|
||||
|
||||
// (op (select (a, c, b)), (select (a, d, b))) -> (select (a, (op c, d), 0))
|
||||
|
@ -683,10 +683,8 @@ define i32 @test47(i32 %x, i32 %y) nounwind {
|
||||
define i1 @and_orn_cmp_1(i32 %a, i32 %b, i32 %c) {
|
||||
; CHECK-LABEL: @and_orn_cmp_1(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[OR]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
|
||||
; CHECK-NEXT: ret i1 [[AND]]
|
||||
;
|
||||
%x = icmp sgt i32 %a, %b
|
||||
@ -697,16 +695,14 @@ define i1 @and_orn_cmp_1(i32 %a, i32 %b, i32 %c) {
|
||||
ret i1 %and
|
||||
}
|
||||
|
||||
; Commute the 'or':
|
||||
; Commute the 'and':
|
||||
; ((Y | ~X) & X) -> (X & Y), where 'not' is an inverted cmp
|
||||
|
||||
define <2 x i1> @and_orn_cmp_2(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
|
||||
; CHECK-LABEL: @and_orn_cmp_2(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp sge <2 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp slt <2 x i32> [[A]], [[B]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <2 x i32> [[C:%.*]], <i32 42, i32 47>
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[Y]], [[X_INV]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <2 x i1> [[OR]], [[X]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <2 x i1> [[Y]], [[X]]
|
||||
; CHECK-NEXT: ret <2 x i1> [[AND]]
|
||||
;
|
||||
%x = icmp sge <2 x i32> %a, %b
|
||||
@ -717,16 +713,14 @@ define <2 x i1> @and_orn_cmp_2(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
|
||||
ret <2 x i1> %and
|
||||
}
|
||||
|
||||
; Commute the 'and':
|
||||
; Commute the 'or':
|
||||
; (X & (~X | Y)) -> (X & Y), where 'not' is an inverted cmp
|
||||
|
||||
define i1 @and_orn_cmp_3(i72 %a, i72 %b, i72 %c) {
|
||||
; CHECK-LABEL: @and_orn_cmp_3(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp ugt i72 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ule i72 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i72 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[X_INV]], [[Y]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[OR]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
|
||||
; CHECK-NEXT: ret i1 [[AND]]
|
||||
;
|
||||
%x = icmp ugt i72 %a, %b
|
||||
@ -737,16 +731,14 @@ define i1 @and_orn_cmp_3(i72 %a, i72 %b, i72 %c) {
|
||||
ret i1 %and
|
||||
}
|
||||
|
||||
; Commute the 'or':
|
||||
; Commute the 'and':
|
||||
; ((~X | Y) & X) -> (X & Y), where 'not' is an inverted cmp
|
||||
|
||||
define <3 x i1> @or_andn_cmp_4(<3 x i32> %a, <3 x i32> %b, <3 x i32> %c) {
|
||||
; CHECK-LABEL: @or_andn_cmp_4(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp eq <3 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ne <3 x i32> [[A]], [[B]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <3 x i32> [[C:%.*]], <i32 42, i32 43, i32 -1>
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <3 x i1> [[X_INV]], [[Y]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <3 x i1> [[OR]], [[X]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <3 x i1> [[Y]], [[X]]
|
||||
; CHECK-NEXT: ret <3 x i1> [[AND]]
|
||||
;
|
||||
%x = icmp eq <3 x i32> %a, %b
|
||||
@ -758,15 +750,13 @@ define <3 x i1> @or_andn_cmp_4(<3 x i32> %a, <3 x i32> %b, <3 x i32> %c) {
|
||||
}
|
||||
|
||||
; In the next 4 tests, vary the types and predicates for extra coverage.
|
||||
; (~X & (Y | X)) -> (X & Y), where 'not' is an inverted cmp
|
||||
; (~X & (Y | X)) -> (~X & Y), where 'not' is an inverted cmp
|
||||
|
||||
define i1 @andn_or_cmp_1(i37 %a, i37 %b, i37 %c) {
|
||||
; CHECK-LABEL: @andn_or_cmp_1(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp sgt i37 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i37 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[X_INV]], [[OR]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[X_INV]], [[Y]]
|
||||
; CHECK-NEXT: ret i1 [[AND]]
|
||||
;
|
||||
%x = icmp sgt i37 %a, %b
|
||||
@ -777,16 +767,14 @@ define i1 @andn_or_cmp_1(i37 %a, i37 %b, i37 %c) {
|
||||
ret i1 %and
|
||||
}
|
||||
|
||||
; Commute the 'or':
|
||||
; ((Y | X) & ~X) -> (X & Y), where 'not' is an inverted cmp
|
||||
; Commute the 'and':
|
||||
; ((Y | X) & ~X) -> (~X & Y), where 'not' is an inverted cmp
|
||||
|
||||
define i1 @andn_or_cmp_2(i16 %a, i16 %b, i16 %c) {
|
||||
; CHECK-LABEL: @andn_or_cmp_2(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp sge i16 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i16 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[OR]], [[X_INV]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
|
||||
; CHECK-NEXT: ret i1 [[AND]]
|
||||
;
|
||||
%x = icmp sge i16 %a, %b
|
||||
@ -797,16 +785,14 @@ define i1 @andn_or_cmp_2(i16 %a, i16 %b, i16 %c) {
|
||||
ret i1 %and
|
||||
}
|
||||
|
||||
; Commute the 'and':
|
||||
; (~X & (X | Y)) -> (X & Y), where 'not' is an inverted cmp
|
||||
; Commute the 'or':
|
||||
; (~X & (X | Y)) -> (~X & Y), where 'not' is an inverted cmp
|
||||
|
||||
define <4 x i1> @andn_or_cmp_3(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
; CHECK-LABEL: @andn_or_cmp_3(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp ugt <4 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ule <4 x i32> [[A]], [[B]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ule <4 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <4 x i32> [[C:%.*]], <i32 42, i32 0, i32 1, i32 -1>
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <4 x i1> [[X]], [[Y]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <4 x i1> [[X_INV]], [[OR]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <4 x i1> [[X_INV]], [[Y]]
|
||||
; CHECK-NEXT: ret <4 x i1> [[AND]]
|
||||
;
|
||||
%x = icmp ugt <4 x i32> %a, %b
|
||||
@ -817,16 +803,14 @@ define <4 x i1> @andn_or_cmp_3(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
ret <4 x i1> %and
|
||||
}
|
||||
|
||||
; Commute the 'or':
|
||||
; ((X | Y) & ~X) -> (X & Y), where 'not' is an inverted cmp
|
||||
; Commute the 'and':
|
||||
; ((X | Y) & ~X) -> (~X & Y), where 'not' is an inverted cmp
|
||||
|
||||
define i1 @andn_or_cmp_4(i32 %a, i32 %b, i32 %c) {
|
||||
; CHECK-LABEL: @andn_or_cmp_4(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[OR]], [[X_INV]]
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
|
||||
; CHECK-NEXT: ret i1 [[AND]]
|
||||
;
|
||||
%x = icmp eq i32 %a, %b
|
||||
|
@ -660,10 +660,8 @@ final:
|
||||
define i1 @or_andn_cmp_1(i32 %a, i32 %b, i32 %c) {
|
||||
; CHECK-LABEL: @or_andn_cmp_1(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[AND]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]]
|
||||
; CHECK-NEXT: ret i1 [[OR]]
|
||||
;
|
||||
%x = icmp sgt i32 %a, %b
|
||||
@ -680,10 +678,8 @@ define i1 @or_andn_cmp_1(i32 %a, i32 %b, i32 %c) {
|
||||
define <2 x i1> @or_andn_cmp_2(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
|
||||
; CHECK-LABEL: @or_andn_cmp_2(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp sge <2 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp slt <2 x i32> [[A]], [[B]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <2 x i32> [[C:%.*]], <i32 42, i32 47>
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <2 x i1> [[Y]], [[X_INV]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[AND]], [[X]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[Y]], [[X]]
|
||||
; CHECK-NEXT: ret <2 x i1> [[OR]]
|
||||
;
|
||||
%x = icmp sge <2 x i32> %a, %b
|
||||
@ -700,10 +696,8 @@ define <2 x i1> @or_andn_cmp_2(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
|
||||
define i1 @or_andn_cmp_3(i72 %a, i72 %b, i72 %c) {
|
||||
; CHECK-LABEL: @or_andn_cmp_3(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp ugt i72 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ule i72 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i72 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[X_INV]], [[Y]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[AND]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]]
|
||||
; CHECK-NEXT: ret i1 [[OR]]
|
||||
;
|
||||
%x = icmp ugt i72 %a, %b
|
||||
@ -720,10 +714,8 @@ define i1 @or_andn_cmp_3(i72 %a, i72 %b, i72 %c) {
|
||||
define <3 x i1> @or_andn_cmp_4(<3 x i32> %a, <3 x i32> %b, <3 x i32> %c) {
|
||||
; CHECK-LABEL: @or_andn_cmp_4(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp eq <3 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ne <3 x i32> [[A]], [[B]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <3 x i32> [[C:%.*]], <i32 42, i32 43, i32 -1>
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <3 x i1> [[X_INV]], [[Y]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <3 x i1> [[AND]], [[X]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <3 x i1> [[Y]], [[X]]
|
||||
; CHECK-NEXT: ret <3 x i1> [[OR]]
|
||||
;
|
||||
%x = icmp eq <3 x i32> %a, %b
|
||||
@ -735,15 +727,13 @@ define <3 x i1> @or_andn_cmp_4(<3 x i32> %a, <3 x i32> %b, <3 x i32> %c) {
|
||||
}
|
||||
|
||||
; In the next 4 tests, vary the types and predicates for extra coverage.
|
||||
; (~X | (Y & X)) -> (X | Y), where 'not' is an inverted cmp
|
||||
; (~X | (Y & X)) -> (~X | Y), where 'not' is an inverted cmp
|
||||
|
||||
define i1 @orn_and_cmp_1(i37 %a, i37 %b, i37 %c) {
|
||||
; CHECK-LABEL: @orn_and_cmp_1(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp sgt i37 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i37 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[X_INV]], [[AND]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[X_INV]], [[Y]]
|
||||
; CHECK-NEXT: ret i1 [[OR]]
|
||||
;
|
||||
%x = icmp sgt i37 %a, %b
|
||||
@ -755,15 +745,13 @@ define i1 @orn_and_cmp_1(i37 %a, i37 %b, i37 %c) {
|
||||
}
|
||||
|
||||
; Commute the 'or':
|
||||
; ((Y & X) | ~X) -> (X | Y), where 'not' is an inverted cmp
|
||||
; ((Y & X) | ~X) -> (~X | Y), where 'not' is an inverted cmp
|
||||
|
||||
define i1 @orn_and_cmp_2(i16 %a, i16 %b, i16 %c) {
|
||||
; CHECK-LABEL: @orn_and_cmp_2(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp sge i16 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i16 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[AND]], [[X_INV]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]]
|
||||
; CHECK-NEXT: ret i1 [[OR]]
|
||||
;
|
||||
%x = icmp sge i16 %a, %b
|
||||
@ -775,15 +763,13 @@ define i1 @orn_and_cmp_2(i16 %a, i16 %b, i16 %c) {
|
||||
}
|
||||
|
||||
; Commute the 'and':
|
||||
; (~X | (X & Y)) -> (X | Y), where 'not' is an inverted cmp
|
||||
; (~X | (X & Y)) -> (~X | Y), where 'not' is an inverted cmp
|
||||
|
||||
define <4 x i1> @orn_and_cmp_3(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
; CHECK-LABEL: @orn_and_cmp_3(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp ugt <4 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ule <4 x i32> [[A]], [[B]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ule <4 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <4 x i32> [[C:%.*]], <i32 42, i32 0, i32 1, i32 -1>
|
||||
; CHECK-NEXT: [[AND:%.*]] = and <4 x i1> [[X]], [[Y]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <4 x i1> [[X_INV]], [[AND]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or <4 x i1> [[X_INV]], [[Y]]
|
||||
; CHECK-NEXT: ret <4 x i1> [[OR]]
|
||||
;
|
||||
%x = icmp ugt <4 x i32> %a, %b
|
||||
@ -795,15 +781,13 @@ define <4 x i1> @orn_and_cmp_3(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
}
|
||||
|
||||
; Commute the 'or':
|
||||
; ((X & Y) | ~X) -> (X | Y), where 'not' is an inverted cmp
|
||||
; ((X & Y) | ~X) -> (~X | Y), where 'not' is an inverted cmp
|
||||
|
||||
define i1 @orn_and_cmp_4(i32 %a, i32 %b, i32 %c) {
|
||||
; CHECK-LABEL: @orn_and_cmp_4(
|
||||
; CHECK-NEXT: [[X:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
|
||||
; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[AND]], [[X_INV]]
|
||||
; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]]
|
||||
; CHECK-NEXT: ret i1 [[OR]]
|
||||
;
|
||||
%x = icmp eq i32 %a, %b
|
||||
|
Loading…
Reference in New Issue
Block a user