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[x86] enable CGP memcmp() expansion for 2/4/8 byte sizes
There are a couple of potential improvements as seen in the IR and asm: 1. We're unnecessarily extending to a larger type to compare values. 2. The codegen for (select cond, 1, -1) could avoid a cmov. (or we could change the order of the compares, so we have a select with 0 operand) llvm-svn: 305802
This commit is contained in:
Sanjay Patel
parent
df21643743
commit
f4fed2c4b8
@ -1662,6 +1662,12 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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MaxStoresPerMemcpyOptSize = 4;
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MaxStoresPerMemmove = 8; // For @llvm.memmove -> sequence of stores
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MaxStoresPerMemmoveOptSize = 4;
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// TODO: These control memcmp expansion in CGP and are set low to prevent
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// altering the vector expansion for 16/32 byte memcmp in SelectionDAGBuilder.
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MaxLoadsPerMemcmp = 1;
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MaxLoadsPerMemcmpOptSize = 1;
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// Set loop alignment to 2^ExperimentalPrefLoopAlignment bytes (default: 2^4).
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setPrefLoopAlignment(ExperimentalPrefLoopAlignment);
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@ -2232,6 +2232,12 @@ bool X86TTIImpl::areInlineCompatible(const Function *Caller,
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return (CallerBits & CalleeBits) == CalleeBits;
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}
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bool X86TTIImpl::expandMemCmp(Instruction *I, unsigned &MaxLoadSize) {
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// TODO: We can increase these based on available vector ops.
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MaxLoadSize = ST->is64Bit() ? 8 : 4;
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return true;
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}
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bool X86TTIImpl::enableInterleavedAccessVectorization() {
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// TODO: We expect this to be beneficial regardless of arch,
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// but there are currently some unexplained performance artifacts on Atom.
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@ -107,7 +107,7 @@ public:
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bool isLegalMaskedScatter(Type *DataType);
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bool areInlineCompatible(const Function *Caller,
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const Function *Callee) const;
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bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize);
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bool enableInterleavedAccessVectorization();
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private:
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int getGSScalarCost(unsigned Opcode, Type *DataTy, bool VariableMask,
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@ -12,19 +12,46 @@ declare i32 @memcmp(i8*, i8*, i64)
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define i32 @length2(i8* %X, i8* %Y) nounwind {
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; X32-LABEL: length2:
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; X32: # BB#0:
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $2
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: calll memcmp
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; X32-NEXT: addl $16, %esp
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; X32: # BB#0: # %loadbb
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movzwl (%ecx), %ecx
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; X32-NEXT: movzwl (%eax), %eax
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; X32-NEXT: rolw $8, %cx
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; X32-NEXT: rolw $8, %ax
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; X32-NEXT: movzwl %cx, %ecx
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; X32-NEXT: movzwl %ax, %eax
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; X32-NEXT: cmpl %eax, %ecx
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; X32-NEXT: je .LBB0_1
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; X32-NEXT: # BB#2: # %res_block
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; X32-NEXT: movl $-1, %eax
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; X32-NEXT: jb .LBB0_4
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; X32-NEXT: # BB#3: # %res_block
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; X32-NEXT: movl $1, %eax
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; X32-NEXT: .LBB0_4: # %endblock
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; X32-NEXT: retl
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; X32-NEXT: .LBB0_1:
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; X32-NEXT: xorl %eax, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: length2:
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; X64: # BB#0:
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; X64-NEXT: movl $2, %edx
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; X64-NEXT: jmp memcmp # TAILCALL
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; X64: # BB#0: # %loadbb
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; X64-NEXT: movzwl (%rdi), %eax
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; X64-NEXT: movzwl (%rsi), %ecx
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; X64-NEXT: rolw $8, %ax
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; X64-NEXT: rolw $8, %cx
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; X64-NEXT: movzwl %ax, %eax
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; X64-NEXT: movzwl %cx, %ecx
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; X64-NEXT: cmpq %rcx, %rax
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; X64-NEXT: je .LBB0_1
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; X64-NEXT: # BB#2: # %res_block
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; X64-NEXT: movl $-1, %ecx
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: cmovbl %ecx, %eax
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; X64-NEXT: retq
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; X64-NEXT: .LBB0_1:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: retq
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%m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind
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ret i32 %m
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}
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@ -145,19 +172,42 @@ define i1 @length3_eq(i8* %X, i8* %Y) nounwind {
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define i32 @length4(i8* %X, i8* %Y) nounwind {
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; X32-LABEL: length4:
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; X32: # BB#0:
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $4
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: calll memcmp
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; X32-NEXT: addl $16, %esp
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; X32: # BB#0: # %loadbb
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl (%ecx), %ecx
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: bswapl %ecx
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; X32-NEXT: bswapl %eax
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; X32-NEXT: cmpl %eax, %ecx
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; X32-NEXT: je .LBB6_1
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; X32-NEXT: # BB#2: # %res_block
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; X32-NEXT: movl $-1, %eax
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; X32-NEXT: jb .LBB6_4
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; X32-NEXT: # BB#3: # %res_block
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; X32-NEXT: movl $1, %eax
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; X32-NEXT: .LBB6_4: # %endblock
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; X32-NEXT: retl
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; X32-NEXT: .LBB6_1:
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; X32-NEXT: xorl %eax, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: length4:
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; X64: # BB#0:
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; X64-NEXT: movl $4, %edx
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; X64-NEXT: jmp memcmp # TAILCALL
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; X64: # BB#0: # %loadbb
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; X64-NEXT: movl (%rdi), %eax
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; X64-NEXT: movl (%rsi), %ecx
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; X64-NEXT: bswapl %eax
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; X64-NEXT: bswapl %ecx
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; X64-NEXT: cmpq %rcx, %rax
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; X64-NEXT: je .LBB6_1
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; X64-NEXT: # BB#2: # %res_block
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; X64-NEXT: movl $-1, %ecx
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: cmovbl %ecx, %eax
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; X64-NEXT: retq
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; X64-NEXT: .LBB6_1:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: retq
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%m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind
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ret i32 %m
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}
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@ -259,9 +309,21 @@ define i32 @length8(i8* %X, i8* %Y) nounwind {
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; X32-NEXT: retl
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;
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; X64-LABEL: length8:
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; X64: # BB#0:
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; X64-NEXT: movl $8, %edx
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; X64-NEXT: jmp memcmp # TAILCALL
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; X64: # BB#0: # %loadbb
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; X64-NEXT: movq (%rdi), %rax
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; X64-NEXT: movq (%rsi), %rcx
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; X64-NEXT: bswapq %rax
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; X64-NEXT: bswapq %rcx
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; X64-NEXT: cmpq %rcx, %rax
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; X64-NEXT: je .LBB11_1
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; X64-NEXT: # BB#2: # %res_block
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; X64-NEXT: movl $-1, %ecx
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: cmovbl %ecx, %eax
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; X64-NEXT: retq
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; X64-NEXT: .LBB11_1:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: retq
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%m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind
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ret i32 %m
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}
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@ -6,9 +6,47 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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declare i32 @memcmp(i8* nocapture, i8* nocapture, i64)
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define i32 @cmp2(i8* nocapture readonly %x, i8* nocapture readonly %y) {
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; ALL-LABEL: @cmp2(
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; ALL-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
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; ALL-NEXT: ret i32 [[CALL]]
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; X32-LABEL: @cmp2(
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; X32-NEXT: loadbb:
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; X32-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i16*
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; X32-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i16*
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; X32-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP0]]
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; X32-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]]
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; X32-NEXT: [[TMP4:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])
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; X32-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
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; X32-NEXT: [[TMP6:%.*]] = zext i16 [[TMP4]] to i32
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; X32-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32
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; X32-NEXT: [[TMP8:%.*]] = sub i32 [[TMP6]], [[TMP7]]
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; X32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
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; X32-NEXT: br i1 [[TMP9]], label %res_block, label %endblock
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; X32: res_block:
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; X32-NEXT: [[TMP10:%.*]] = icmp ult i32 [[TMP6]], [[TMP7]]
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; X32-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i32 -1, i32 1
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; X32-NEXT: br label %endblock
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; X32: endblock:
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; X32-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP11]], %res_block ]
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; X32-NEXT: ret i32 [[PHI_RES]]
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;
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; X64-LABEL: @cmp2(
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; X64-NEXT: loadbb:
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; X64-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i16*
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; X64-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i16*
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; X64-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP0]]
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; X64-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]]
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; X64-NEXT: [[TMP4:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])
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; X64-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
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; X64-NEXT: [[TMP6:%.*]] = zext i16 [[TMP4]] to i64
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; X64-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i64
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; X64-NEXT: [[TMP8:%.*]] = sub i64 [[TMP6]], [[TMP7]]
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; X64-NEXT: [[TMP9:%.*]] = icmp ne i64 [[TMP8]], 0
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; X64-NEXT: br i1 [[TMP9]], label %res_block, label %endblock
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; X64: res_block:
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; X64-NEXT: [[TMP10:%.*]] = icmp ult i64 [[TMP6]], [[TMP7]]
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; X64-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i32 -1, i32 1
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; X64-NEXT: br label %endblock
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; X64: endblock:
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; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP11]], %res_block ]
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; X64-NEXT: ret i32 [[PHI_RES]]
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;
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%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
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ret i32 %call
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@ -24,9 +62,45 @@ define i32 @cmp3(i8* nocapture readonly %x, i8* nocapture readonly %y) {
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}
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define i32 @cmp4(i8* nocapture readonly %x, i8* nocapture readonly %y) {
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; ALL-LABEL: @cmp4(
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; ALL-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* %x, i8* %y, i64 4)
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; ALL-NEXT: ret i32 [[CALL]]
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; X32-LABEL: @cmp4(
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; X32-NEXT: loadbb:
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; X32-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i32*
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; X32-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i32*
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; X32-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]]
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; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]]
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; X32-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
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; X32-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
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; X32-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[TMP5]]
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; X32-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0
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; X32-NEXT: br i1 [[TMP7]], label %res_block, label %endblock
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; X32: res_block:
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; X32-NEXT: [[TMP8:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]]
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; X32-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 -1, i32 1
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; X32-NEXT: br label %endblock
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; X32: endblock:
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; X32-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP9]], %res_block ]
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; X32-NEXT: ret i32 [[PHI_RES]]
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;
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; X64-LABEL: @cmp4(
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; X64-NEXT: loadbb:
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; X64-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i32*
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; X64-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i32*
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; X64-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]]
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; X64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]]
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; X64-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
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; X64-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
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; X64-NEXT: [[TMP6:%.*]] = zext i32 [[TMP4]] to i64
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; X64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP5]] to i64
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; X64-NEXT: [[TMP8:%.*]] = sub i64 [[TMP6]], [[TMP7]]
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; X64-NEXT: [[TMP9:%.*]] = icmp ne i64 [[TMP8]], 0
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; X64-NEXT: br i1 [[TMP9]], label %res_block, label %endblock
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; X64: res_block:
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; X64-NEXT: [[TMP10:%.*]] = icmp ult i64 [[TMP6]], [[TMP7]]
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; X64-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i32 -1, i32 1
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; X64-NEXT: br label %endblock
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; X64: endblock:
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; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP11]], %res_block ]
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; X64-NEXT: ret i32 [[PHI_RES]]
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;
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%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 4)
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ret i32 %call
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@ -60,9 +134,28 @@ define i32 @cmp7(i8* nocapture readonly %x, i8* nocapture readonly %y) {
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}
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define i32 @cmp8(i8* nocapture readonly %x, i8* nocapture readonly %y) {
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; ALL-LABEL: @cmp8(
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; ALL-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
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; ALL-NEXT: ret i32 [[CALL]]
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; X32-LABEL: @cmp8(
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; X32-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
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; X32-NEXT: ret i32 [[CALL]]
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;
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; X64-LABEL: @cmp8(
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; X64-NEXT: loadbb:
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; X64-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i64*
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; X64-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i64*
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; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]]
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; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]]
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; X64-NEXT: [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
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; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
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; X64-NEXT: [[TMP6:%.*]] = sub i64 [[TMP4]], [[TMP5]]
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; X64-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 0
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; X64-NEXT: br i1 [[TMP7]], label %res_block, label %endblock
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; X64: res_block:
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; X64-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP4]], [[TMP5]]
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; X64-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 -1, i32 1
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; X64-NEXT: br label %endblock
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; X64: endblock:
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; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP9]], %res_block ]
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; X64-NEXT: ret i32 [[PHI_RES]]
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;
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%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
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ret i32 %call
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@ -142,8 +235,13 @@ define i32 @cmp16(i8* nocapture readonly %x, i8* nocapture readonly %y) {
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define i32 @cmp_eq2(i8* nocapture readonly %x, i8* nocapture readonly %y) {
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; ALL-LABEL: @cmp_eq2(
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; ALL-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
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; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
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; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* %x to i16*
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; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* %y to i16*
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; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]]
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; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]]
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; ALL-NEXT: [[TMP5:%.*]] = icmp ne i16 [[TMP3]], [[TMP4]]
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; ALL-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
|
||||
; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
|
||||
; ALL-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
|
||||
; ALL-NEXT: ret i32 [[CONV]]
|
||||
;
|
||||
@ -168,8 +266,13 @@ define i32 @cmp_eq3(i8* nocapture readonly %x, i8* nocapture readonly %y) {
|
||||
|
||||
define i32 @cmp_eq4(i8* nocapture readonly %x, i8* nocapture readonly %y) {
|
||||
; ALL-LABEL: @cmp_eq4(
|
||||
; ALL-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* %x, i8* %y, i64 4)
|
||||
; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
|
||||
; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* %x to i32*
|
||||
; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* %y to i32*
|
||||
; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]]
|
||||
; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]]
|
||||
; ALL-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
|
||||
; ALL-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
|
||||
; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
|
||||
; ALL-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
|
||||
; ALL-NEXT: ret i32 [[CONV]]
|
||||
;
|
||||
@ -219,11 +322,22 @@ define i32 @cmp_eq7(i8* nocapture readonly %x, i8* nocapture readonly %y) {
|
||||
}
|
||||
|
||||
define i32 @cmp_eq8(i8* nocapture readonly %x, i8* nocapture readonly %y) {
|
||||
; ALL-LABEL: @cmp_eq8(
|
||||
; ALL-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
|
||||
; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
|
||||
; ALL-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
|
||||
; ALL-NEXT: ret i32 [[CONV]]
|
||||
; X32-LABEL: @cmp_eq8(
|
||||
; X32-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
|
||||
; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
|
||||
; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
|
||||
; X32-NEXT: ret i32 [[CONV]]
|
||||
;
|
||||
; X64-LABEL: @cmp_eq8(
|
||||
; X64-NEXT: [[TMP1:%.*]] = bitcast i8* %x to i64*
|
||||
; X64-NEXT: [[TMP2:%.*]] = bitcast i8* %y to i64*
|
||||
; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]]
|
||||
; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]]
|
||||
; X64-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
|
||||
; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
|
||||
; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
|
||||
; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
|
||||
; X64-NEXT: ret i32 [[CONV]]
|
||||
;
|
||||
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
|
||||
%cmp = icmp eq i32 %call, 0
|
||||
|
||||
Loading…
Reference in New Issue
Block a user