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[SystemZ] Separate LoZ ELF specifics in tablegen.

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Separate the LoZ ELF calling convention in tablegen.
This will make it easier to add the z/OS ABI in future patches.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D96867
This commit is contained in:
Yusra Syeda 2021-02-17 16:06:02 -05:00 committed by Kai Nacke
parent 840095b1e1
commit f6b1828d93
13 changed files with 64 additions and 40 deletions
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27
lib/Target/SystemZ/SystemZCallingConv.td
View File

@ -28,7 +28,7 @@ class CCIfShortVector<CCAction A>
//===----------------------------------------------------------------------===//
// z/Linux return value calling convention
//===----------------------------------------------------------------------===//
def RetCC_SystemZ : CallingConv<[
def RetCC_SystemZ_ELF : CallingConv<[
// Promote i32 to i64 if it has an explicit extension type.
CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
@ -83,7 +83,7 @@ def CC_SystemZ_GHC : CallingConv<[
//===----------------------------------------------------------------------===//
// z/Linux argument calling conventions
//===----------------------------------------------------------------------===//
def CC_SystemZ : CallingConv<[
def CC_SystemZ_ELF : CallingConv<[
CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_SystemZ_GHC>>,
// Promote i32 to i64 if it has an explicit extension type.
@ -139,11 +139,11 @@ def CC_SystemZ : CallingConv<[
//===----------------------------------------------------------------------===//
// z/Linux callee-saved registers
//===----------------------------------------------------------------------===//
def CSR_SystemZ : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
def CSR_SystemZ_ELF : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
(sequence "F%dD", 8, 15))>;
// R9 is used to return SwiftError; remove it from CSR.
def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ, R9D)>;
def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ_ELF, R9D)>;
// "All registers" as used by the AnyReg calling convention.
// Note that registers 0 and 1 are still defined as intra-call scratch
@ -155,3 +155,22 @@ def CSR_SystemZ_AllRegs_Vector : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
def CSR_SystemZ_NoRegs : CalleeSavedRegs<(add)>;
//===----------------------------------------------------------------------===//
// s390x return value calling convention
//===----------------------------------------------------------------------===//
def RetCC_SystemZ : CallingConv<[
// ELF Linux SystemZ
CCIfSubtarget<"isTargetELF()", CCDelegateTo<RetCC_SystemZ_ELF>>
]>;
//===----------------------------------------------------------------------===//
// s390x argument calling conventions
//===----------------------------------------------------------------------===//
def CC_SystemZ : CallingConv<[
// ELF Linux SystemZ
CCIfSubtarget<"isTargetELF()", CCDelegateTo<CC_SystemZ_ELF>>
]>;

31
lib/Target/SystemZ/SystemZInstrInfo.td
View File

@ -6,6 +6,8 @@
//
//===----------------------------------------------------------------------===//
def IsTargetELF : Predicate<"Subtarget->isTargetELF()">;
//===----------------------------------------------------------------------===//
// Stack allocation
//===----------------------------------------------------------------------===//
@ -274,20 +276,23 @@ let isCall = 1, Defs = [CC] in {
}
// Regular calls.
let isCall = 1, Defs = [R14D, CC], Uses = [FPC] in {
def CallBRASL : Alias<6, (outs), (ins pcrel32:$I2, variable_ops),
[(z_call pcrel32:$I2)]>;
def CallBASR : Alias<2, (outs), (ins ADDR64:$R2, variable_ops),
[(z_call ADDR64:$R2)]>;
}
// z/Linux ELF
let Predicates = [IsTargetELF] in {
let isCall = 1, Defs = [R14D, CC], Uses = [FPC] in {
def CallBRASL : Alias<6, (outs), (ins pcrel32:$I2, variable_ops),
[(z_call pcrel32:$I2)]>;
def CallBASR : Alias<2, (outs), (ins ADDR64:$R2, variable_ops),
[(z_call ADDR64:$R2)]>;
}
// TLS calls. These will be lowered into a call to __tls_get_offset,
// with an extra relocation specifying the TLS symbol.
let isCall = 1, Defs = [R14D, CC] in {
def TLS_GDCALL : Alias<6, (outs), (ins tlssym:$I2, variable_ops),
[(z_tls_gdcall tglobaltlsaddr:$I2)]>;
def TLS_LDCALL : Alias<6, (outs), (ins tlssym:$I2, variable_ops),
[(z_tls_ldcall tglobaltlsaddr:$I2)]>;
// TLS calls. These will be lowered into a call to __tls_get_offset,
// with an extra relocation specifying the TLS symbol.
let isCall = 1, Defs = [R14D, CC] in {
def TLS_GDCALL : Alias<6, (outs), (ins tlssym:$I2, variable_ops),
[(z_tls_gdcall tglobaltlsaddr:$I2)]>;
def TLS_LDCALL : Alias<6, (outs), (ins tlssym:$I2, variable_ops),
[(z_tls_ldcall tglobaltlsaddr:$I2)]>;
}
}
// Sibling calls.

4
lib/Target/SystemZ/SystemZRegisterInfo.cpp
View File

@ -202,7 +202,7 @@ SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
MF->getFunction().getAttributes().hasAttrSomewhere(
Attribute::SwiftError))
return CSR_SystemZ_SwiftError_SaveList;
return CSR_SystemZ_SaveList;
return CSR_SystemZ_ELF_SaveList;
}
const uint32_t *
@ -218,7 +218,7 @@ SystemZRegisterInfo::getCallPreservedMask(const MachineFunction &MF,
MF.getFunction().getAttributes().hasAttrSomewhere(
Attribute::SwiftError))
return CSR_SystemZ_SwiftError_RegMask;
return CSR_SystemZ_RegMask;
return CSR_SystemZ_ELF_RegMask;
}
BitVector

2
test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir
View File

@ -155,7 +155,7 @@ body: |
ADJCALLSTACKDOWN 0, 0
%12 = LZDR
$f0d = COPY %12
CallBRASL &fmod, killed $f0d, undef $f2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $f0d
CallBRASL &fmod, killed $f0d, undef $f2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $f0d
ADJCALLSTACKUP 0, 0
KILL killed $f0d

12
test/CodeGen/SystemZ/clear-liverange-spillreg.mir
View File

@ -248,7 +248,7 @@ body: |
ADJCALLSTACKDOWN 0, 0
%49 = LGFR %120.subreg_l32
$r2d = COPY %49
CallBRASL @Get_Direct_Cost8x8, killed $r2d, undef $r3d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
CallBRASL @Get_Direct_Cost8x8, killed $r2d, undef $r3d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
ADJCALLSTACKUP 0, 0
%51 = COPY killed $r2d
MVHHI %7, 0, 0 :: (store 2)
@ -264,7 +264,7 @@ body: |
bb.14:
%124 = AHIMux %124, 1, implicit-def dead $cc
ADJCALLSTACKDOWN 0, 0
CallBRASL @store_coding_state, undef $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
CallBRASL @store_coding_state, undef $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
ADJCALLSTACKUP 0, 0
%125 = COPY %12
J %bb.16
@ -342,10 +342,10 @@ body: |
$r4d = LGHI 0
$r5d = COPY %98
$r6d = COPY %99
CallBRASL @SetRefAndMotionVectors, killed $r2d, killed $r3d, killed $r4d, killed $r5d, killed $r6d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
CallBRASL @SetRefAndMotionVectors, killed $r2d, killed $r3d, killed $r4d, killed $r5d, killed $r6d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
ADJCALLSTACKUP 0, 0
ADJCALLSTACKDOWN 0, 0
CallBRASL @reset_coding_state, undef $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
CallBRASL @reset_coding_state, undef $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
ADJCALLSTACKUP 0, 0
%120 = LA %120, 1, $noreg
CGHI %120, 4, implicit-def $cc
@ -373,11 +373,11 @@ body: |
successors: %bb.26(0x00000001), %bb.24(0x7fffffff)
ADJCALLSTACKDOWN 0, 0
CallBRASL @Get_Direct_CostMB, undef $f0d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
CallBRASL @Get_Direct_CostMB, undef $f0d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
ADJCALLSTACKUP 0, 0
ADJCALLSTACKDOWN 0, 0
$r2d = LGHI 0
CallBRASL @SetModesAndRefframeForBlocks, killed $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
CallBRASL @SetModesAndRefframeForBlocks, killed $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
ADJCALLSTACKUP 0, 0
CHIMux undef %111, 13, implicit-def $cc
BRC 14, 8, %bb.26, implicit killed $cc

2
test/CodeGen/SystemZ/cond-move-04.mir
View File

@ -68,7 +68,7 @@ body: |
%7 = LGFR %0
$r3d = LGHI 0
$r4d = COPY %7
CallBRASL @foo, undef $r2d, killed $r3d, killed $r4d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
CallBRASL @foo, undef $r2d, killed $r3d, killed $r4d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
ADJCALLSTACKUP 0, 0
J %bb.1

2
test/CodeGen/SystemZ/cond-move-08.mir
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@ -155,7 +155,7 @@ body: |
bb.4.bb33:
ADJCALLSTACKDOWN 0, 0
CallBRASL @fun, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
CallBRASL @fun, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
ADJCALLSTACKUP 0, 0
STRL %4, @globvar :: (store 4 into @globvar)
CLFIMux undef %23:grx32bit, 1, implicit-def $cc

2
test/CodeGen/SystemZ/cond-move-regalloc-hints-02.mir
View File

@ -47,7 +47,7 @@ body: |
ADJCALLSTACKDOWN 0, 0
%10:gr64bit = LGFR %0
$r2d = COPY %10
CallBRASL @foo, killed $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
CallBRASL @foo, killed $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
ADJCALLSTACKUP 0, 0
J %bb.1

6
test/CodeGen/SystemZ/cond-move-regalloc-hints.mir
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@ -200,16 +200,16 @@ body: |
%32:gr64bit = COPY $r3d
%0:gr64bit = COPY $r2d
ADJCALLSTACKDOWN 0, 0
CallBRASL @sre_malloc, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
CallBRASL @sre_malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
%1:addr64bit = COPY $r2d
ADJCALLSTACKUP 0, 0
ADJCALLSTACKDOWN 0, 0
CallBRASL @sre_malloc, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
CallBRASL @sre_malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
%2:addr64bit = COPY $r2d
ADJCALLSTACKUP 0, 0
%3:gr32bit = AHIMuxK %0.subreg_l32, -1, implicit-def dead $cc
ADJCALLSTACKDOWN 0, 0
CallBRASL @malloc, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
CallBRASL @malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
ADJCALLSTACKUP 0, 0
%55:gr32bit = AHIMuxK %0.subreg_l32, 3, implicit-def dead $cc
%56:addr64bit = LGHI 0

8
test/CodeGen/SystemZ/int-cmp-56.mir
View File

@ -65,7 +65,7 @@ body: |
%8:gr64bit = LG %0, 112, $noreg
%9:gr64bit = LG %0, 128, $noreg
ADJCALLSTACKDOWN 0, 0
CallBRASL @foo, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2d
CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2d
%10:gr64bit = COPY $r2d
ADJCALLSTACKUP 0, 0
CGR %10, %1, implicit-def $cc
@ -142,7 +142,7 @@ body: |
%8:gr64bit = LG %0, 112, $noreg
%9:gr64bit = LG %0, 128, $noreg
ADJCALLSTACKDOWN 0, 0
CallBRASL @foo, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2d
CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2d
%10:gr64bit = COPY $r2d
ADJCALLSTACKUP 0, 0
CGR %10, %1, implicit-def $cc
@ -219,7 +219,7 @@ body: |
%8:gr32bit = LMux %0, 56, $noreg
%9:gr32bit = LMux %0, 64, $noreg
ADJCALLSTACKDOWN 0, 0
CallBRASL @foo, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
%10:gr32bit = COPY $r2l
ADJCALLSTACKUP 0, 0
CR %10, %1, implicit-def $cc
@ -296,7 +296,7 @@ body: |
%8:gr32bit = LMux %0, 56, $noreg
%9:gr32bit = LMux %0, 64, $noreg
ADJCALLSTACKDOWN 0, 0
CallBRASL @foo, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
%10:gr32bit = COPY $r2l
ADJCALLSTACKUP 0, 0
CR %10, %1, implicit-def $cc

2
test/CodeGen/SystemZ/multiselect-02.mir
View File

@ -36,7 +36,7 @@ body: |
%15:gr32bit = Select32 %11, %4, 14, 4, implicit $cc
ADJCALLSTACKDOWN 0, 0
$r2d = COPY %14
CallBRASL @bar, $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
CallBRASL @bar, $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
ADJCALLSTACKUP 0, 0
$r2l = COPY %15
Return implicit $r2l

4
test/CodeGen/SystemZ/regcoal-subranges-update.mir
View File

@ -63,7 +63,7 @@ body: |
; CHECK: $r3d = LGHI 0
; CHECK: $r4d = LGHI 0
; CHECK: $r5d = COPY [[LGFR]]
; CHECK: KILL killed $r2d, killed $r3d, killed $r4d, $r5d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
; CHECK: KILL killed $r2d, killed $r3d, killed $r4d, $r5d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
; CHECK: ADJCALLSTACKUP 0, 0
; CHECK: [[LGHI]]:addr64bit = nuw nsw LA [[LGHI]], 1, $noreg
; CHECK: J %bb.1
@ -85,7 +85,7 @@ body: |
$r3d = COPY %2
$r4d = COPY %2
$r5d = COPY killed %4
KILL killed $r2d, killed $r3d, killed $r4d, killed $r5d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
KILL killed $r2d, killed $r3d, killed $r4d, killed $r5d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
ADJCALLSTACKUP 0, 0
%1:gr64bit = nuw nsw LA killed %0, 1, $noreg
%7:addr64bit = COPY killed %1

2
test/DebugInfo/MIR/SystemZ/call-site-lzer.mir
View File

@ -77,7 +77,7 @@ body: |
$r11d = LGR $r15d
CFI_INSTRUCTION def_cfa_register $r11d
renamable $f0s = LZER
CallBRASL @callee, $f0s, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, debug-location !16
CallBRASL @callee, $f0s, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, debug-location !16
$r2d = LGHI 0, debug-location !17
$r11d, $r15d = LMG $r11d, 248, implicit-def $r14d, debug-location !17
Return implicit killed $r2d, debug-location !17