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Have SimplifyBinOp dispatch Xor, Add and Sub to the corresponding methods
(they had just been forgotten before). Adding Xor causes "main" in the existing testcase 2010-11-01-lshr-mask.ll to be hugely more simplified. llvm-svn: 122245
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@ -11,7 +11,9 @@
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// that do not require creating new instructions. This does constant folding
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// ("add i32 1, 1" -> "2") but can also handle non-constant operands, either
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// returning a constant ("and i32 %x, 0" -> "0") or an already existing value
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// ("and i32 %x, %x" -> "%x").
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// ("and i32 %x, %x" -> "%x"). All operands are assumed to have already been
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// simplified: This is usually true and assuming it simplifies the logic (if
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// they have not been simplified then results are correct but maybe suboptimal).
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//
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//===----------------------------------------------------------------------===//
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@ -229,8 +231,9 @@ static Value *ThreadCmpOverPHI(CmpInst::Predicate Pred, Value *LHS, Value *RHS,
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/// SimplifyAddInst - Given operands for an Add, see if we can
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/// fold the result. If not, this returns null.
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Value *llvm::SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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const TargetData *TD, const DominatorTree *) {
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static Value *SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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const TargetData *TD, const DominatorTree *DT,
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unsigned MaxRecurse) {
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if (Constant *CLHS = dyn_cast<Constant>(Op0)) {
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if (Constant *CRHS = dyn_cast<Constant>(Op1)) {
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Constant *Ops[] = { CLHS, CRHS };
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@ -252,6 +255,7 @@ Value *llvm::SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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// X + (Y - X) -> Y
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// (Y - X) + X -> Y
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// Eg: X + -X -> 0
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Value *Y = 0;
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if (match(Op1, m_Sub(m_Value(Y), m_Specific(Op0))) ||
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match(Op0, m_Sub(m_Value(Y), m_Specific(Op1))))
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@ -274,10 +278,16 @@ Value *llvm::SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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return 0;
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}
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Value *llvm::SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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const TargetData *TD, const DominatorTree *DT) {
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return ::SimplifyAddInst(Op0, Op1, isNSW, isNUW, TD, DT, RecursionLimit);
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}
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/// SimplifySubInst - Given operands for a Sub, see if we can
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/// fold the result. If not, this returns null.
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Value *llvm::SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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const TargetData *TD, const DominatorTree *) {
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static Value *SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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const TargetData *TD, const DominatorTree *,
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unsigned MaxRecurse) {
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if (Constant *CLHS = dyn_cast<Constant>(Op0))
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if (Constant *CRHS = dyn_cast<Constant>(Op1)) {
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Constant *Ops[] = { CLHS, CRHS };
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@ -317,6 +327,11 @@ Value *llvm::SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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return 0;
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}
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Value *llvm::SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
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const TargetData *TD, const DominatorTree *DT) {
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return ::SimplifySubInst(Op0, Op1, isNSW, isNUW, TD, DT, RecursionLimit);
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}
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/// SimplifyAndInst - Given operands for an And, see if we can
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/// fold the result. If not, this returns null.
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static Value *SimplifyAndInst(Value *Op0, Value *Op1, const TargetData *TD,
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@ -826,6 +841,13 @@ static Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS,
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switch (Opcode) {
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case Instruction::And: return SimplifyAndInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::Or: return SimplifyOrInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::Xor: return SimplifyXorInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::Add: return SimplifyAddInst(LHS, RHS, /* isNSW */ false,
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/* isNUW */ false, TD, DT,
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MaxRecurse);
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case Instruction::Sub: return SimplifySubInst(LHS, RHS, /* isNSW */ false,
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/* isNUW */ false, TD, DT,
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MaxRecurse);
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default:
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if (Constant *CLHS = dyn_cast<Constant>(LHS))
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if (Constant *CRHS = dyn_cast<Constant>(RHS)) {
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@ -5,14 +5,16 @@
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define i32 @main(i32 %argc) nounwind ssp {
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entry:
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%tmp3151 = trunc i32 %argc to i8
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; CHECK: %tmp3162 = shl i8 %tmp3151, 5
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; CHECK: and i8 %tmp3162, 64
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; CHECK-NOT: shl
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; CHECK-NOT: shr
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%tmp3161 = or i8 %tmp3151, -17
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%tmp3162 = and i8 %tmp3151, 122
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%tmp3163 = xor i8 %tmp3162, -17
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%tmp4114 = shl i8 %tmp3163, 6
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%tmp4115 = xor i8 %tmp4114, %tmp3163
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%tmp4120 = xor i8 %tmp3161, %tmp4115
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; CHECK: lshr i8 %tmp4115, 1
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; CHECK-NOT: shl i8 %tmp4126, 6
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%tmp4126 = lshr i8 %tmp4120, 7
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%tmp4127 = mul i8 %tmp4126, 64
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%tmp4086 = zext i8 %tmp4127 to i32
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