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[mips] Do not use SLL for ANY_EXTEND nodes as the high bits are undefined.
Reviewers: dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15420 llvm-svn: 262230
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@ -514,7 +514,8 @@ def : MipsPat<(rotr GPR64:$rt, (i32 (trunc GPR64:$rs))),
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(DROTRV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>;
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// 32-to-64-bit extension
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def : MipsPat<(i64 (anyext GPR32:$src)), (SLL64_32 GPR32:$src)>;
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def : MipsPat<(i64 (anyext GPR32:$src)),
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(INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPR32:$src, sub_32)>;
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def : MipsPat<(i64 (zext GPR32:$src)), (DSRL (DSLL64_32 GPR32:$src), 32)>;
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def : MipsPat<(i64 (sext GPR32:$src)), (SLL64_32 GPR32:$src)>;
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@ -158,9 +158,6 @@ entry:
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; sret pointer is already in $4
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; N32-DAG: lui [[PTR_HI:\$[0-9]+]], %hi(struct_128xi16)
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; N32-DAG: addiu [[PTR:\$[0-9]+]], [[PTR_HI]], %lo(struct_128xi16)
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; FIXME: This signext isn't necessary. Like integers, pointers are
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; but unlike integers, pointers cannot have the signext attribute.
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; N32-DAG: sll $5, [[PTR]], 0
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; N32: jal memcpy
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; sret pointer is already in $4
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@ -1,6 +1,9 @@
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; RUN: llc < %s -march=mips64el -mcpu=mips4 -target-abi=n64 | FileCheck %s -check-prefix=64
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; RUN: llc < %s -march=mips64el -mcpu=mips64 -target-abi=n64 | FileCheck %s -check-prefix=64
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; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s -check-prefix=64R2
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; RUN: llc < %s -march=mips64el -mcpu=mips4 -target-abi=n64 | \
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; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64
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; RUN: llc < %s -march=mips64el -mcpu=mips64 -target-abi=n64 | \
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; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64
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; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | \
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; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64R2
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declare double @copysign(double, double) nounwind readnone
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@ -8,7 +11,8 @@ declare float @copysignf(float, float) nounwind readnone
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define float @func2(float %d, double %f) nounwind readnone {
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entry:
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; 64: func2
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; ALL-LABEL: func2:
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; 64-DAG: lui $[[T0:[0-9]+]], 32767
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; 64-DAG: ori $[[MSK0:[0-9]+]], $[[T0]], 65535
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; 64-DAG: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]
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@ -30,17 +34,18 @@ entry:
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define double @func3(double %d, float %f) nounwind readnone {
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entry:
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; ALL-LABEL: func3:
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; 64: func3
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; 64-DAG: daddiu $[[T0:[0-9]+]], $zero, 1
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; 64-DAG: dsll $[[T1:[0-9]+]], $[[T0]], 63
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; 64-DAG: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1
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; 64-DAG: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]
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; 64-DAG: srl $[[SRL:[0-9]+]], ${{[0-9]+}}, 31
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; 64-DAG: sll $[[SLL:[0-9]+]], $[[SRL]], 0
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; 64-DAG: dsll $[[DSLL:[0-9]+]], $[[SLL]], 63
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; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
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; 64: dmtc1 $[[OR]], $f0
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; 64-DAG: mfc1 $[[MFC:[0-9]+]], $f13
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; 64-DAG: srl $[[SRL:[0-9]+]], $[[MFC:[0-9]+]], 31
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; 64: dsll $[[DSLL:[0-9]+]], $[[SRL]], 63
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; 64-DAG: daddiu $[[R1:[0-9]+]], $zero, 1
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; 64-DAG: dsll $[[R2:[0-9]+]], $[[R1]], 63
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; 64-DAG: daddiu $[[R3:[0-9]+]], $[[R2]], -1
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; 64-DAG: dmfc1 $[[R0:[0-9]+]], ${{.*}}
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; 64: and $[[AND0:[0-9]+]], $[[R0]], $[[R3]]
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; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
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; 64: dmtc1 $[[OR]], $f0
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; 64R2: ext ${{[0-9]+}}, ${{[0-9]+}}, 31, 1
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; 64R2: dins $[[INS:[0-9]+]], ${{[0-9]+}}, 63, 1
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@ -51,4 +56,3 @@ entry:
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%call = tail call double @copysign(double %add, double %conv) nounwind readnone
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ret double %call
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}
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