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On ARM, alignment is in bits
Add lr as a hard coded operand of bx llvm-svn: 28494
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@ -44,6 +44,7 @@ namespace {
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ZeroDirective = "\t.skip\t";
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CommentString = "!";
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ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
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AlignmentIsInBytes = false;
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}
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/// We name each basic block in a Function with a unique number, so
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@ -110,7 +111,7 @@ bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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assert(0 && "Not implemented");
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break;
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}
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EmitAlignment(4, F);
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EmitAlignment(2, F);
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O << CurrentFnName << ":\n";
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// Print out code for the function.
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@ -42,7 +42,11 @@ def ADJCALLSTACKDOWN : InstARM<(ops i32imm:$amt),
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"!ADJCALLSTACKDOWN $amt",
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[(callseq_start imm:$amt)]>;
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def BX: InstARM<(ops), "bx", [(retflag)]>;
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//bx supports other registers as operands. So this looks like a
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//hack. Maybe a ret should be expanded to a "branch lr" and bx
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//declared as a regular instruction
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def BX: InstARM<(ops), "bx lr", [(retflag)]>;
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def ldr : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
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"ldr $dst, [$addr]",
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