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This patch fixes a Mips specific bug where
we need to generate a N64 compound relocation R_MIPS_GPREL_32/R_MIPS_64/R_MIPS_NONE. The bug was exposed by the SingleSourcetest case DuffsDevice.c. Contributer: Jack Carter llvm-svn: 172496
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@ -108,7 +108,13 @@ unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
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Type = ELF::R_MIPS_64;
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break;
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case FK_GPRel_4:
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Type = ELF::R_MIPS_GPREL32;
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if (isN64()) {
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Type = setRType((unsigned)ELF::R_MIPS_GPREL32, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_64, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_NONE, Type);
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}
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else
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Type = ELF::R_MIPS_GPREL32;
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break;
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case Mips::fixup_Mips_GPREL16:
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Type = ELF::R_MIPS_GPREL16;
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37
test/MC/Mips/elf-gprel-32-64.ll
Normal file
37
test/MC/Mips/elf-gprel-32-64.ll
Normal file
@ -0,0 +1,37 @@
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; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \
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; RUN: | elf-dump --dump-section-data \
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; RUN: | FileCheck %s
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define i32 @test(i32 %c) nounwind {
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entry:
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switch i32 %c, label %sw.default [
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i32 0, label %sw.bb
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i32 1, label %sw.bb2
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i32 2, label %sw.bb5
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i32 3, label %sw.bb8
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]
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sw.bb:
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br label %return
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sw.bb2:
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br label %return
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sw.bb5:
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br label %return
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sw.bb8:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32 [ -1, %sw.default ], [ 7, %sw.bb8 ], [ 2, %sw.bb5 ], [ 3, %sw.bb2 ], [ 1, %sw.bb ]
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ret i32 %retval.0
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}
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; Check that the appropriate relocations were created.
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; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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; CHECK: (('sh_name', 0x{{[a-z0-9]+}}) # '.rela.rodata'
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; CHECK: ('r_type3', 0x00)
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; CHECK-NEXT: ('r_type2', 0x12)
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; CHECK-NEXT: ('r_type', 0x0c)
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