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Identify unconditional gotos and generate a page sel instructions before them.
llvm-svn: 74172
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parent
5e0be0b9a1
commit
f81b920608
@ -133,6 +133,8 @@ public:
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if (MO.isGlobal())
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return addGlobalAddress(MO.getGlobal(), MO.getOffset(),
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MO.getTargetFlags());
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if (MO.isMBB())
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return addMBB(MO.getMBB());
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if (MO.isCPI())
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return addConstantPoolIndex(MO.getIndex(), MO.getOffset(),
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MO.getTargetFlags());
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@ -109,7 +109,7 @@ bool MemSelOpt::processInstruction(MachineInstr *MI) {
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// If this insn is not going to access any memory, return.
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const TargetInstrDesc &TID = TII->get(MI->getOpcode());
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if (! (TID.isCall() || TID.mayLoad() || TID.mayStore()))
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if (!(TID.isBranch() || TID.isCall() || TID.mayLoad() || TID.mayStore()))
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return false;
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// Scan for the memory address operand.
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@ -119,8 +119,9 @@ bool MemSelOpt::processInstruction(MachineInstr *MI) {
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for (unsigned i = 0; i < NumOperands; i++) {
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MachineOperand Op = MI->getOperand(i);
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if (Op.getType() == MachineOperand::MO_GlobalAddress ||
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Op.getType() == MachineOperand::MO_ExternalSymbol) {
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// We found one mem operand. Next one should be BS.
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Op.getType() == MachineOperand::MO_ExternalSymbol ||
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Op.getType() == MachineOperand::MO_MachineBasicBlock) {
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// We found one mem operand. Next one may be BS.
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MemOpPos = i;
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break;
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}
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@ -133,7 +134,8 @@ bool MemSelOpt::processInstruction(MachineInstr *MI) {
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MachineOperand &Op = MI->getOperand(MemOpPos);
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// If this is a pagesel material, handle it first.
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if (MI->getOpcode() == PIC16::CALL) {
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if (MI->getOpcode() == PIC16::CALL ||
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MI->getOpcode() == PIC16::br_uncond) {
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DebugLoc dl = MI->getDebugLoc();
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BuildMI(*MBB, MI, dl, TII->get(PIC16::pagesel)).
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addOperand(Op);
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