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AVX-512: A new test for FMA intrinsic
A new test that explores sub-optimal sequence of FMA intrinsic and FNEG operation. An upcoming patch will fix it. llvm-svn: 278117
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Elena Demikhovsky
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a91df40f10
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f831f99e8e
111
test/CodeGen/X86/fma-fneg-combine.ll
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111
test/CodeGen/X86/fma-fneg-combine.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512dq | FileCheck %s
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; This test checks combinations of FNEG and FMA intrinsics on AVX-512 target
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; PR28892
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define <16 x float> @test1(<16 x float> %a, <16 x float> %b, <16 x float> %c) {
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; CHECK-LABEL: test1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vxorps {{.*}}(%rip), %zmm2, %zmm2
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; CHECK-NEXT: vfmadd213ps %zmm2, %zmm1, %zmm0
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; CHECK-NEXT: retq
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entry:
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%sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %c
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%0 = tail call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %sub.i, i16 -1, i32 4) #2
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ret <16 x float> %0
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}
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declare <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
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declare <16 x float> @llvm.x86.avx512.mask.vfnmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
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declare <16 x float> @llvm.x86.avx512.mask.vfnmsub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
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define <16 x float> @test2(<16 x float> %a, <16 x float> %b, <16 x float> %c) {
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; CHECK-LABEL: test2:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vfmadd213ps %zmm2, %zmm1, %zmm0
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; CHECK-NEXT: vxorps {{.*}}(%rip), %zmm0, %zmm0
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; CHECK-NEXT: retq
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entry:
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%0 = tail call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %c, i16 -1, i32 4) #2
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%sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
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ret <16 x float> %sub.i
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}
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define <16 x float> @test3(<16 x float> %a, <16 x float> %b, <16 x float> %c) {
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; CHECK-LABEL: test3:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vfnmadd213ps %zmm2, %zmm1, %zmm0
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; CHECK-NEXT: vxorps {{.*}}(%rip), %zmm0, %zmm0
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; CHECK-NEXT: retq
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entry:
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%0 = tail call <16 x float> @llvm.x86.avx512.mask.vfnmadd.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %c, i16 -1, i32 4) #2
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%sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
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ret <16 x float> %sub.i
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}
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define <16 x float> @test4(<16 x float> %a, <16 x float> %b, <16 x float> %c) {
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; CHECK-LABEL: test4:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vfnmsub213ps %zmm2, %zmm1, %zmm0
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; CHECK-NEXT: vxorps {{.*}}(%rip), %zmm0, %zmm0
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; CHECK-NEXT: retq
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entry:
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%0 = tail call <16 x float> @llvm.x86.avx512.mask.vfnmsub.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %c, i16 -1, i32 4) #2
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%sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
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ret <16 x float> %sub.i
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}
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define <16 x float> @test5(<16 x float> %a, <16 x float> %b, <16 x float> %c) {
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; CHECK-LABEL: test5:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vxorps {{.*}}(%rip), %zmm2, %zmm2
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; CHECK-NEXT: vfmadd213ps {ru-sae}, %zmm2, %zmm0, %zmm1
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; CHECK-NEXT: vmovaps %zmm1, %zmm0
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; CHECK-NEXT: retq
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entry:
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%sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %c
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%0 = tail call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %sub.i, i16 -1, i32 2) #2
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ret <16 x float> %0
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}
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define <16 x float> @test6(<16 x float> %a, <16 x float> %b, <16 x float> %c) {
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; CHECK-LABEL: test6:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vfnmsub213ps {ru-sae}, %zmm2, %zmm0, %zmm1
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; CHECK-NEXT: vxorps {{.*}}(%rip), %zmm1, %zmm0
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; CHECK-NEXT: retq
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entry:
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%0 = tail call <16 x float> @llvm.x86.avx512.mask.vfnmsub.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %c, i16 -1, i32 2) #2
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%sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
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ret <16 x float> %sub.i
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}
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define <8 x float> @test7(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
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; CHECK-LABEL: test7:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vfmsub213ps %ymm2, %ymm1, %ymm0
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; CHECK-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0
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; CHECK-NEXT: retq
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entry:
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%0 = tail call <8 x float> @llvm.x86.fma.vfmsub.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %c) #2
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%sub.i = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
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ret <8 x float> %sub.i
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}
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define <8 x float> @test8(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
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; CHECK-LABEL: test8:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vxorps {{.*}}(%rip), %ymm2, %ymm2
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; CHECK-NEXT: vfmsub213ps %ymm2, %ymm1, %ymm0
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; CHECK-NEXT: retq
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entry:
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%sub.c = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %c
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%0 = tail call <8 x float> @llvm.x86.fma.vfmsub.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %sub.c) #2
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ret <8 x float> %0
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}
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declare <8 x float> @llvm.x86.fma.vfmsub.ps.256(<8 x float>, <8 x float>, <8 x float>)
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