RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
Code Issues Projects Releases Wiki Activity

Teach the address selector to make 'reg+reg' addressing modes.

Browse Source 
llvm-svn: 19457
This commit is contained in:
Chris Lattner 2005-01-11 04:40:19 +00:00
parent 7e9642515c
commit f867443d7e
1 changed files with 11 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
lib/Target/X86/X86ISelPattern.cpp
View File

@ -443,9 +443,18 @@ bool ISel::SelectAddress(SDOperand N, X86AddressMode &AM) {
}
}
if (AM.BaseType != X86AddressMode::RegBase ||
AM.Base.Reg)
// Is the base register already occupied?
if (AM.BaseType != X86AddressMode::RegBase || AM.Base.Reg) {
// If so, check to see if the scale index register is set.
if (AM.IndexReg == 0) {
AM.IndexReg = SelectExpr(N);
AM.Scale = 1;
return false;
}
// Otherwise, we cannot select it.
return true;
}
// Default, generate it as a register.
AM.BaseType = X86AddressMode::RegBase;