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OpaquePtr: Bulk update tests to use typed sret

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This commit is contained in:
Matt Arsenault 2020-11-20 14:07:11 -05:00
parent 06a316e7a3
commit f8cfaf8c10
199 changed files with 533 additions and 533 deletions
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8
test/Analysis/Lint/noalias-byval.ll
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@ -17,14 +17,14 @@ entry:
%0 = bitcast %s* %c to i8*
%1 = bitcast %s* %tmp to i8*
call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 1, i1 false)
call void @f1(%s* sret %c, %s* %c)
call void @f1(%s* sret(%s) %c, %s* %c)
ret void
}
; Lint should complain about us passing %c to both arguments since one of them
; is noalias.
; CHECK: Unusual: noalias argument aliases another argument
; CHECK-NEXT: call void @f1(%s* sret %c, %s* %c)
; CHECK-NEXT: call void @f1(%s* sret(%s) %c, %s* %c)
declare void @f3(%s* noalias nocapture sret, %s* byval(%s) nocapture readnone)
@ -35,7 +35,7 @@ entry:
%0 = bitcast %s* %c to i8*
%1 = bitcast %s* %tmp to i8*
call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 1, i1 false)
call void @f3(%s* sret %c, %s* byval(%s) %c)
call void @f3(%s* sret(%s) %c, %s* byval(%s) %c)
ret void
}
@ -43,6 +43,6 @@ entry:
; noalias, since the other one is byval, effectively copying the data to the
; stack instead of passing the pointer itself.
; CHECK-NOT: Unusual: noalias argument aliases another argument
; CHECK-NOT: call void @f3(%s* sret %c, %s* byval(%s) %c)
; CHECK-NOT: call void @f3(%s* sret(%s) %c, %s* byval(%s) %c)
attributes #0 = { argmemonly nounwind }

2
test/Analysis/ValueTracking/memory-dereferenceable.ll
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@ -20,7 +20,7 @@ declare i32* @foo()
@globalptr.align16 = external global i8, align 16
; CHECK-LABEL: 'test'
define void @test(%struct.A* sret %result,
define void @test(%struct.A* sret(%struct.A) %result,
i32 addrspace(1)* dereferenceable(8) %dparam,
i8 addrspace(1)* dereferenceable(32) align 1 %dparam.align1,
i8 addrspace(1)* dereferenceable(32) align 16 %dparam.align16,

2
test/Assembler/invalid-immarg.ll
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@ -13,7 +13,7 @@ declare void @llvm.immarg.inreg(i32 inreg immarg)
declare void @llvm.immarg.nest(i32* nest immarg)
; CHECK: Attribute 'immarg' is incompatible with other attributes
declare void @llvm.immarg.sret(i32* sret immarg)
declare void @llvm.immarg.sret(i32* sret(i32) immarg)
; CHECK: Attribute 'immarg' is incompatible with other attributes
declare void @llvm.immarg.zeroext(i32 zeroext immarg)

2
test/Bitcode/DIExpression-aggresult.ll
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@ -1,7 +1,7 @@
; RUN: llvm-dis -o - %s.bc | FileCheck %s
%class.A = type { i32, i32, i32, i32 }
define void @_Z3fooi(%class.A* sret %agg.result) #0 !dbg !3 {
define void @_Z3fooi(%class.A* sret(%class.A) %agg.result) #0 !dbg !3 {
; CHECK: call void @llvm.dbg.declare({{.*}}, metadata !DIExpression()), !dbg
call void @llvm.dbg.declare(metadata %class.A* %agg.result, metadata !13, metadata !16), !dbg !17
ret void, !dbg !17

2
test/Bitcode/attributes-3.3.ll
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@ -29,7 +29,7 @@ define void @f4(i8 inreg %0)
ret void;
}
define void @f5(i8* sret %0)
define void @f5(i8* sret(i8) %0)
; CHECK: define void @f5(i8* sret(i8) %0)
{
ret void;

2
test/Bitcode/attributes.ll
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@ -26,7 +26,7 @@ define void @f4(i8 inreg %0)
ret void;
}
define void @f5(i8* sret %0)
define void @f5(i8* sret(i8) %0)
; CHECK: define void @f5(i8* sret(i8) %0)
{
ret void;

2
test/Bitcode/compatibility-3.6.ll
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@ -407,7 +407,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret)
declare void @f.param.sret(i8* sret(i8))
; CHECK: declare void @f.param.sret(i8* sret(i8))
declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias)

2
test/Bitcode/compatibility-3.7.ll
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@ -413,7 +413,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret)
declare void @f.param.sret(i8* sret(i8))
; CHECK: declare void @f.param.sret(i8* sret(i8))
declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias)

2
test/Bitcode/compatibility-3.8.ll
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@ -438,7 +438,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret)
declare void @f.param.sret(i8* sret(i8))
; CHECK: declare void @f.param.sret(i8* sret(i8))
declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias)

2
test/Bitcode/compatibility-3.9.ll
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@ -507,7 +507,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret)
declare void @f.param.sret(i8* sret(i8))
; CHECK: declare void @f.param.sret(i8* sret(i8))
declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias)

2
test/Bitcode/compatibility-4.0.ll
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@ -507,7 +507,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret)
declare void @f.param.sret(i8* sret(i8))
; CHECK: declare void @f.param.sret(i8* sret(i8))
declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias)

2
test/Bitcode/compatibility-5.0.ll
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@ -511,7 +511,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret)
declare void @f.param.sret(i8* sret(i8))
; CHECK: declare void @f.param.sret(i8* sret(i8))
declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias)

2
test/Bitcode/compatibility-6.0.ll
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@ -518,7 +518,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret)
declare void @f.param.sret(i8* sret(i8))
; CHECK: declare void @f.param.sret(i8* sret(i8))
declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias)

2
test/Bitcode/compatibility.ll
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@ -534,7 +534,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret)
declare void @f.param.sret(i8* sret(i8))
; CHECK: declare void @f.param.sret(i8* sret(i8))
declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias)

6
test/Bitcode/highLevelStructure.3.2.ll
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@ -36,7 +36,7 @@ declare void @ParamAttr1(i8 zeroext)
; CHECK: declare void @ParamAttr2(i8* nest)
declare void @ParamAttr2(i8* nest)
; CHECK: declare void @ParamAttr3(i8* sret(i8))
declare void @ParamAttr3(i8* sret)
declare void @ParamAttr3(i8* sret(i8))
; CHECK: declare void @ParamAttr4(i8 signext)
declare void @ParamAttr4(i8 signext)
; CHECK: declare void @ParamAttr5(i8* inreg)
@ -49,8 +49,8 @@ declare void @ParamAttr7(i8* noalias)
declare void @ParamAttr8(i8* nocapture)
; CHECK: declare void @ParamAttr9{{[(i8* nest noalias nocapture) | (i8* noalias nocapture nest)]}}
declare void @ParamAttr9(i8* nest noalias nocapture)
; CHECK: declare void @ParamAttr10{{[(i8* sret noalias nocapture) | (i8* noalias nocapture sret)]}}
declare void @ParamAttr10(i8* sret noalias nocapture)
; CHECK: declare void @ParamAttr10{{[(i8* sret(i8) noalias nocapture) | (i8* noalias nocapture sret(i8))]}}
declare void @ParamAttr10(i8* sret(i8) noalias nocapture)
;CHECK: declare void @ParamAttr11{{[(i8* byval(i8) noalias nocapture) | (i8* noalias nocapture byval(i8))]}}
declare void @ParamAttr11(i8* byval(i8) noalias nocapture)
;CHECK: declare void @ParamAttr12{{[(i8* inreg noalias nocapture) | (i8* noalias nocapture inreg)]}}

6
test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
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@ -2,10 +2,10 @@
; RUN: llc < %s -mtriple arm64-apple-darwin -global-isel -stop-after=irtranslator -verify-machineinstrs | FileCheck %s
; Check that we don't try to tail-call with a non-forwarded sret parameter.
declare void @test_explicit_sret(i64* sret)
declare void @test_explicit_sret(i64* sret(i64))
; Forwarded explicit sret pointer => we can tail call.
define void @can_tail_call_forwarded_explicit_sret_ptr(i64* sret %arg) {
define void @can_tail_call_forwarded_explicit_sret_ptr(i64* sret(i64) %arg) {
; CHECK-LABEL: name: can_tail_call_forwarded_explicit_sret_ptr
; CHECK: bb.1 (%ir-block.0):
; CHECK: liveins: $x8
@ -17,7 +17,7 @@ define void @can_tail_call_forwarded_explicit_sret_ptr(i64* sret %arg) {
}
; Not marked as tail, so don't tail call.
define void @test_call_explicit_sret(i64* sret %arg) {
define void @test_call_explicit_sret(i64* sret(i64) %arg) {
; CHECK-LABEL: name: test_call_explicit_sret
; CHECK: bb.1 (%ir-block.0):
; CHECK: liveins: $x8

4
test/CodeGen/AArch64/GlobalISel/swifterror.ll
View File

@ -159,7 +159,7 @@ bb_end:
; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
; parameter.
define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
; CHECK-LABEL: foo_sret:
; CHECK: mov [[SRET:x[0-9]+]], x8
; CHECK: mov w0, #16
@ -198,7 +198,7 @@ entry:
%s = alloca %struct.S, align 8
%error_ptr_ref = alloca swifterror %swift_error*
store %swift_error* null, %swift_error** %error_ptr_ref
call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
%error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
%had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
%tmp = bitcast %swift_error* %error_from_foo to i8*

2
test/CodeGen/AArch64/arm64-alloc-no-stack-realign.ll
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@ -5,7 +5,7 @@
; aligned.
@T3_retval = common global <16 x float> zeroinitializer, align 16
define void @test(<16 x float>* noalias sret %agg.result) nounwind ssp {
define void @test(<16 x float>* noalias sret(<16 x float>) %agg.result) nounwind ssp {
entry:
; CHECK: test
; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], [sp, #32]

6
test/CodeGen/AArch64/arm64-windows-calls.ll
View File

@ -51,7 +51,7 @@ entry:
; Arguments > 16 bytes should be passed in X8.
%struct.S3 = type { i32, i32, i32, i32, i32 }
define dso_local void @"?f3"(%struct.S3* noalias sret %agg.result) {
define dso_local void @"?f3"(%struct.S3* noalias sret(%struct.S3) %agg.result) {
entry:
; CHECK-LABEL: f3
; CHECK: stp xzr, xzr, [x8]
@ -73,7 +73,7 @@ entry:
; InReg arguments to non-instance methods must be passed in X0 and returns in
; X0.
%class.B = type { i32 }
define dso_local void @"?f4"(%class.B* inreg noalias nocapture sret %agg.result) {
define dso_local void @"?f4"(%class.B* inreg noalias nocapture sret(%class.B) %agg.result) {
entry:
; CHECK-LABEL: f4
; CHECK: mov w8, #1
@ -87,7 +87,7 @@ entry:
%class.C = type { i8 }
%class.A = type { i8 }
define dso_local void @"?inst@C"(%class.C* %this, %class.A* inreg noalias sret %agg.result) {
define dso_local void @"?inst@C"(%class.C* %this, %class.A* inreg noalias sret(%class.A) %agg.result) {
entry:
; CHECK-LABEL: inst@C
; CHECK: str x0, [sp, #8]

2
test/CodeGen/AArch64/arm64-windows-tailcall.ll
View File

@ -4,7 +4,7 @@
%class.C = type { [1 x i32] }
define dso_local void @"?bar"(%class.C* inreg noalias sret %agg.result) {
define dso_local void @"?bar"(%class.C* inreg noalias sret(%class.C) %agg.result) {
entry:
; CHECK-LABEL: bar
; CHECK: mov x19, x0

4
test/CodeGen/AArch64/arm64_32.ll
View File

@ -422,7 +422,7 @@ define void @test_bare_frameaddr(i8** %addr) {
ret void
}
define void @test_sret_use([8 x i64]* sret %out) {
define void @test_sret_use([8 x i64]* sret([8 x i64]) %out) {
; CHECK-LABEL: test_sret_use:
; CHECK: str xzr, [x8]
%addr = getelementptr [8 x i64], [8 x i64]* %out, i32 0, i32 0
@ -435,7 +435,7 @@ define i64 @test_sret_call() {
; CHECK: mov x8, sp
; CHECK: bl _test_sret_use
%arr = alloca [8 x i64]
call void @test_sret_use([8 x i64]* sret %arr)
call void @test_sret_use([8 x i64]* sret([8 x i64]) %arr)
%addr = getelementptr [8 x i64], [8 x i64]* %arr, i32 0, i32 0
%val = load i64, i64* %addr

2
test/CodeGen/AArch64/func-argpassing.ll
View File

@ -106,7 +106,7 @@ define [2 x i64] @return_struct() {
; to preserve value semantics) in x8. Strictly this only applies to
; structs larger than 16 bytes, but C semantics can still be provided
; if LLVM does it to %myStruct too. So this is the simplest check
define void @return_large_struct(%myStruct* sret %retval) {
define void @return_large_struct(%myStruct* sret(%myStruct) %retval) {
; CHECK-LABEL: return_large_struct:
%addr0 = getelementptr %myStruct, %myStruct* %retval, i64 0, i32 0
%addr1 = getelementptr %myStruct, %myStruct* %retval, i64 0, i32 1

4
test/CodeGen/AArch64/func-calls.ll
View File

@ -43,7 +43,7 @@ define void @simple_args() {
declare i32 @return_int()
declare double @return_double()
declare [2 x i64] @return_smallstruct()
declare void @return_large_struct(%myStruct* sret %retval)
declare void @return_large_struct(%myStruct* sret(%myStruct) %retval)
define void @simple_rets() {
; CHECK-LABEL: simple_rets:
@ -65,7 +65,7 @@ define void @simple_rets() {
; CHECK: add x[[VARSMALLSTRUCT:[0-9]+]], {{x[0-9]+}}, :lo12:varsmallstruct
; CHECK: stp x0, x1, [x[[VARSMALLSTRUCT]]]
call void @return_large_struct(%myStruct* sret @varstruct)
call void @return_large_struct(%myStruct* sret(%myStruct) @varstruct)
; CHECK: add x8, {{x[0-9]+}}, {{#?}}:lo12:varstruct
; CHECK: bl return_large_struct

4
test/CodeGen/AArch64/swifterror.ll
View File

@ -243,7 +243,7 @@ bb_end:
; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
; parameter.
define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
; CHECK-APPLE-LABEL: foo_sret:
; CHECK-APPLE: mov [[SRET:x[0-9]+]], x8
; CHECK-APPLE: mov w0, #16
@ -309,7 +309,7 @@ entry:
%s = alloca %struct.S, align 8
%error_ptr_ref = alloca swifterror %swift_error*
store %swift_error* null, %swift_error** %error_ptr_ref
call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
%error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
%had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
%tmp = bitcast %swift_error* %error_from_foo to i8*

10
test/CodeGen/AArch64/tailcall-explicit-sret.ll
View File

@ -4,13 +4,13 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
; Check that we don't try to tail-call with a non-forwarded sret parameter.
declare void @test_explicit_sret(i1024* sret) #0
declare void @test_explicit_sret(i1024* sret(i1024)) #0
; This is the only OK case, where we forward the explicit sret pointer.
; CHECK-LABEL: _test_tailcall_explicit_sret:
; CHECK-NEXT: b _test_explicit_sret
define void @test_tailcall_explicit_sret(i1024* sret %arg) #0 {
define void @test_tailcall_explicit_sret(i1024* sret(i1024) %arg) #0 {
tail call void @test_explicit_sret(i1024* %arg)
ret void
}
@ -19,7 +19,7 @@ define void @test_tailcall_explicit_sret(i1024* sret %arg) #0 {
; CHECK-NOT: mov x8
; CHECK: bl _test_explicit_sret
; CHECK: ret
define void @test_call_explicit_sret(i1024* sret %arg) #0 {
define void @test_call_explicit_sret(i1024* sret(i1024) %arg) #0 {
call void @test_explicit_sret(i1024* %arg)
ret void
}
@ -82,7 +82,7 @@ define i1024 @test_tailcall_explicit_sret_alloca_returned() #0 {
; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]
; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]
; CHECK: ret
define void @test_indirect_tailcall_explicit_sret_nosret_arg(i1024* sret %arg, void (i1024*)* %f) #0 {
define void @test_indirect_tailcall_explicit_sret_nosret_arg(i1024* sret(i1024) %arg, void (i1024*)* %f) #0 {
%l = alloca i1024, align 8
tail call void %f(i1024* %l)
%r = load i1024, i1024* %l, align 8
@ -97,7 +97,7 @@ define void @test_indirect_tailcall_explicit_sret_nosret_arg(i1024* sret %arg, v
; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]
; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]
; CHECK: ret
define void @test_indirect_tailcall_explicit_sret_(i1024* sret %arg, i1024 ()* %f) #0 {
define void @test_indirect_tailcall_explicit_sret_(i1024* sret(i1024) %arg, i1024 ()* %f) #0 {
%ret = tail call i1024 %f()
store i1024 %ret, i1024* %arg, align 8
ret void

10
test/CodeGen/AArch64/tailcall-string-rvo.ll
View File

@ -17,15 +17,15 @@ target triple = "aarch64-linux-gnu"
%"struct.__gnu_cxx::__vstring_utility<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider.7.38.69" = type { i8* }
%union.anon.8.39.70 = type { i64, [8 x i8] }
declare void @TestBaz(%class.basic_string.11.42.73* noalias sret %arg)
declare void @TestBaz(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
define void @TestBar(%class.basic_string.11.42.73* noalias sret %arg) {
define void @TestBar(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg) {
bb:
call void @TestBaz(%class.basic_string.11.42.73* noalias sret %arg)
call void @TestBaz(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
ret void
}
define void @TestFoo(%class.basic_string.11.42.73* noalias sret %arg) {
define void @TestFoo(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg) {
; CHECK-LABEL: TestFoo:
; CHECK: b TestBar
bb:
@ -38,7 +38,7 @@ bb:
store i64 13, i64* %tmp3, align 8
%tmp4 = getelementptr inbounds %class.basic_string.11.42.73, %class.basic_string.11.42.73* %arg, i64 0, i32 0, i32 0, i32 2, i32 1, i64 5
store i8 0, i8* %tmp4, align 1
tail call void @TestBar(%class.basic_string.11.42.73* noalias sret %arg)
tail call void @TestBar(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
ret void
}

4
test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
View File

@ -1141,7 +1141,7 @@ define {i8, i32} @struct_i8_i32_func_void() #0 {
ret { i8, i32 } %val
}
define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret %arg0) #0 {
define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret({ i8, i32 }) %arg0) #0 {
; CHECK-LABEL: name: void_func_sret_struct_i8_i32
; CHECK: bb.1 (%ir-block.0):
; CHECK: liveins: $vgpr0, $sgpr30_sgpr31
@ -1302,7 +1302,7 @@ define { <3 x float>, i32 } @v3f32_struct_func_void_wasted_reg() #0 {
ret { <3 x float>, i32 } %insert.4
}
define void @void_func_sret_max_known_zero_bits(i8 addrspace(5)* sret %arg0) #0 {
define void @void_func_sret_max_known_zero_bits(i8 addrspace(5)* sret(i8) %arg0) #0 {
; CHECK-LABEL: name: void_func_sret_max_known_zero_bits
; CHECK: bb.1 (%ir-block.0):
; CHECK: liveins: $vgpr0, $sgpr30_sgpr31

4
test/CodeGen/AMDGPU/function-returns.ll
View File

@ -459,7 +459,7 @@ define {i8, i32} @struct_i8_i32_func_void() #0 {
; GCN: buffer_load_dword [[VAL1:v[0-9]+]]
; GCN: buffer_store_byte [[VAL0]], v0, s[0:3], 0 offen{{$}}
; GCN: buffer_store_dword [[VAL1]], v0, s[0:3], 0 offen offset:4{{$}}
define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret %arg0) #0 {
define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret({ i8, i32 }) %arg0) #0 {
%val0 = load volatile i8, i8 addrspace(1)* undef
%val1 = load volatile i32, i32 addrspace(1)* undef
%gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
@ -645,7 +645,7 @@ define { <3 x float>, i32 } @v3f32_struct_func_void_wasted_reg() #0 {
; GCN: v_mov_b32_e32 [[HIGH_BITS:v[0-9]+]], 0
; GCN: ds_write_b32 {{v[0-9]+}}, [[HIGH_BITS]]
; GCN-NEXT: ds_write_b32 {{v[0-9]+}}, [[HIGH_BITS]]
define void @void_func_sret_max_known_zero_bits(i8 addrspace(5)* sret %arg0) #0 {
define void @void_func_sret_max_known_zero_bits(i8 addrspace(5)* sret(i8) %arg0) #0 {
%arg0.int = ptrtoint i8 addrspace(5)* %arg0 to i32
%lshr0 = lshr i32 %arg0.int, 16

4
test/CodeGen/AMDGPU/rewrite-out-arguments.ll
View File

@ -108,11 +108,11 @@ define void @skip_store_gep(i32* %val) #0 {
ret void
}
; CHECK-LABEL: define void @skip_sret(i32* sret %sret, i32* %out) #0 {
; CHECK-LABEL: define void @skip_sret(i32* sret(i32) %sret, i32* %out) #0 {
; CHECK-NEXT: store
; CHECK-NEXT: store
; CHECK-NEXT: ret void
define void @skip_sret(i32* sret %sret, i32* %out) #0 {
define void @skip_sret(i32* sret(i32) %sret, i32* %out) #0 {
store i32 1, i32* %sret
store i32 0, i32* %out
ret void

6
test/CodeGen/ARM/2009-07-18-RewriterBug.ll
View File

@ -8,7 +8,7 @@
@_2E_str7 = internal constant [21 x i8] c"ERROR: Only 1 point!\00", section "__TEXT,__cstring,cstring_literals", align 1
@llvm.used = appending global [1 x i8*] [i8* bitcast (void (%struct.EDGE_PAIR*, %struct.VERTEX*, %struct.VERTEX*)* @build_delaunay to i8*)], section "llvm.metadata"
define void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
define void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret(%struct.EDGE_PAIR) %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
entry:
%delright = alloca %struct.EDGE_PAIR, align 8
%delleft = alloca %struct.EDGE_PAIR, align 8
@ -29,10 +29,10 @@ bb1.i:
br i1 %6, label %get_low.exit, label %bb1.i
get_low.exit:
call void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
call void @build_delaunay(%struct.EDGE_PAIR* noalias sret(%struct.EDGE_PAIR) %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
%7 = getelementptr %struct.VERTEX, %struct.VERTEX* %tree, i32 0, i32 1
%8 = load %struct.VERTEX*, %struct.VERTEX** %7, align 4
call void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
call void @build_delaunay(%struct.EDGE_PAIR* noalias sret(%struct.EDGE_PAIR) %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
%9 = getelementptr %struct.EDGE_PAIR, %struct.EDGE_PAIR* %delleft, i32 0, i32 0
%10 = load %struct.edge_rec*, %struct.edge_rec** %9, align 8
%11 = getelementptr %struct.EDGE_PAIR, %struct.EDGE_PAIR* %delleft, i32 0, i32 1

2
test/CodeGen/ARM/2009-08-21-PostRAKill2.ll
View File

@ -11,7 +11,7 @@ target triple = "armv7-apple-darwin9"
declare double @floor(double) nounwind readnone
define void @intcoord(%struct.icstruct* noalias nocapture sret %agg.result, i1 %a, double %b) {
define void @intcoord(%struct.icstruct* noalias nocapture sret(%struct.icstruct) %agg.result, i1 %a, double %b) {
entry:
br i1 %a, label %bb3, label %bb1

2
test/CodeGen/ARM/2009-09-21-LiveVariablesBug.ll
View File

@ -7,7 +7,7 @@
declare arm_aapcs_vfpcc <4 x float> @bbb(%bar*) nounwind
define arm_aapcs_vfpcc void @aaa(%foo* noalias sret %agg.result, %foo* %tfrm) nounwind {
define arm_aapcs_vfpcc void @aaa(%foo* noalias sret(%foo) %agg.result, %foo* %tfrm) nounwind {
entry:
%0 = call arm_aapcs_vfpcc <4 x float> @bbb(%bar* undef) nounwind ; <<4 x float>> [#uses=0]
ret void

2
test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll
View File

@ -3,7 +3,7 @@
%0 = type { double, double }
define void @foo(%0* noalias nocapture sret %agg.result, double %x.0, double %y.0) nounwind {
define void @foo(%0* noalias nocapture sret(%0) %agg.result, double %x.0, double %y.0) nounwind {
; CHECK-LABEL: foo:
; CHECK: bl __aeabi_dadd
; CHECK-NOT: strd

2
test/CodeGen/ARM/2009-11-01-NeonMoves.ll
View File

@ -5,7 +5,7 @@ target triple = "armv7-eabi"
%foo = type { <4 x float> }
define arm_aapcs_vfpcc void @bar(%foo* noalias sret %agg.result, <4 x float> %quat.0) nounwind {
define arm_aapcs_vfpcc void @bar(%foo* noalias sret(%foo) %agg.result, <4 x float> %quat.0) nounwind {
entry:
%quat_addr = alloca %foo, align 16 ; <%foo*> [#uses=2]
%0 = getelementptr inbounds %foo, %foo* %quat_addr, i32 0, i32 0 ; <<4 x float>*> [#uses=1]

2
test/CodeGen/ARM/2009-12-02-vtrn-undef.ll
View File

@ -6,7 +6,7 @@ target triple = "armv7-apple-darwin10"
%struct.int16x8_t = type { <8 x i16> }
%struct.int16x8x2_t = type { [2 x %struct.int16x8_t] }
define void @t(%struct.int16x8x2_t* noalias nocapture sret %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
define void @t(%struct.int16x8x2_t* noalias nocapture sret(%struct.int16x8x2_t) %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
entry:
;CHECK: vtrn.16
%0 = shufflevector <8 x i16> %tmp.0, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>

4
test/CodeGen/ARM/2012-01-26-CopyPropKills.ll
View File

@ -77,7 +77,7 @@ bb3: ; preds = %bb2
%tmp60 = fadd <4 x float> %tmp59, undef
%tmp61 = fadd <4 x float> %tmp60, zeroinitializer
%tmp62 = load void (i8*, i8*)*, void (i8*, i8*)** undef, align 4
call arm_aapcs_vfpcc void %tmp62(i8* sret undef, i8* undef) nounwind
call arm_aapcs_vfpcc void %tmp62(i8* sret(i8) undef, i8* undef) nounwind
%tmp63 = bitcast <4 x float> %tmp46 to i128
%tmp64 = bitcast <4 x float> %tmp54 to i128
%tmp65 = bitcast <4 x float> %tmp61 to i128
@ -93,7 +93,7 @@ bb3: ; preds = %bb2
%tmp75 = insertvalue [8 x i64] %tmp74, i64 undef, 5
%tmp76 = insertvalue [8 x i64] %tmp75, i64 undef, 6
%tmp77 = insertvalue [8 x i64] %tmp76, i64 undef, 7
call arm_aapcs_vfpcc void @bar(i8* sret null, [8 x i64] %tmp77) nounwind
call arm_aapcs_vfpcc void @bar(i8* sret(i8) null, [8 x i64] %tmp77) nounwind
%tmp78 = call arm_aapcs_vfpcc i8* null(i8* null) nounwind
%tmp79 = bitcast i8* %tmp78 to i512*
%tmp80 = load i512, i512* %tmp79, align 16

4
test/CodeGen/ARM/alloc-no-stack-realign.ll
View File

@ -5,7 +5,7 @@
; objects that are assumed to be 64-byte aligned.
@T3_retval = common global <16 x float> zeroinitializer, align 16
define void @test1(<16 x float>* noalias sret %agg.result) nounwind ssp "no-realign-stack" {
define void @test1(<16 x float>* noalias sret(<16 x float>) %agg.result) nounwind ssp "no-realign-stack" {
entry:
; CHECK-LABEL: test1:
; CHECK: ldr r[[R1:[0-9]+]], [pc, r[[R1]]]
@ -42,7 +42,7 @@ entry:
ret void
}
define void @test2(<16 x float>* noalias sret %agg.result) nounwind ssp {
define void @test2(<16 x float>* noalias sret(<16 x float>) %agg.result) nounwind ssp {
entry:
; CHECK-LABEL: test2:
; CHECK: ldr r[[R1:[0-9]+]], [pc, r[[R1]]]

4
test/CodeGen/ARM/cmse-errors.ll
View File

@ -3,7 +3,7 @@
%struct.two_ints = type { i32, i32 }
%struct.__va_list = type { i8* }
define void @test1(%struct.two_ints* noalias nocapture sret align 4 %agg.result) "cmse_nonsecure_entry" {
define void @test1(%struct.two_ints* noalias nocapture sret(%struct.two_ints) align 4 %agg.result) "cmse_nonsecure_entry" {
entry:
%0 = bitcast %struct.two_ints* %agg.result to i64*
store i64 8589934593, i64* %0, align 4
@ -29,7 +29,7 @@ define void @test4(void (%struct.two_ints*)* nocapture %p) {
entry:
%r = alloca %struct.two_ints, align 4
%0 = bitcast %struct.two_ints* %r to i8*
call void %p(%struct.two_ints* nonnull sret align 4 %r) "cmse_nonsecure_call"
call void %p(%struct.two_ints* nonnull sret(%struct.two_ints) align 4 %r) "cmse_nonsecure_call"
ret void
}
; CHECK: error: {{.*}}test4{{.*}}: call to non-secure function would return value through pointer

2
test/CodeGen/ARM/coalesce-subregs.ll
View File

@ -294,7 +294,7 @@ bb:
; The shuffle in if.else3 must be preserved even though adjustCopiesBackFrom
; is tempted to remove it.
; CHECK: vorr d
define internal void @adjustCopiesBackFrom(<2 x i64>* noalias nocapture sret %agg.result, <2 x i64> %in) {
define internal void @adjustCopiesBackFrom(<2 x i64>* noalias nocapture sret(<2 x i64>) %agg.result, <2 x i64> %in) {
entry:
%0 = extractelement <2 x i64> %in, i32 0
%cmp = icmp slt i64 %0, 1

8
test/CodeGen/ARM/interval-update-remat.ll
View File

@ -52,7 +52,7 @@ entry:
%call5 = call %class.TestCompletionCallback.9.234.284.1309.2334* @_ZN22TestCompletionCallbackC1Ev(%class.TestCompletionCallback.9.234.284.1309.2334* nonnull %callback)
%transport_socket_pool_ = getelementptr inbounds %class.SOCKSClientSocketPoolTest_AsyncSOCKSConnectError_Test.1.226.276.1301.2326, %class.SOCKSClientSocketPoolTest_AsyncSOCKSConnectError_Test.1.226.276.1301.2326* %this, i32 0, i32 0
%call6 = call i32 @_ZN29MockTransportClientSocketPool5m_fn9Ev(%class.MockTransportClientSocketPool.0.225.275.1300.2325* %transport_socket_pool_)
call void @_Z11CmpHelperEQPcS_xx(%class.AssertionResult.24.249.299.1324.2349* nonnull sret %gtest_ar, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i64 0, i64 undef)
call void @_Z11CmpHelperEQPcS_xx(%class.AssertionResult.24.249.299.1324.2349* nonnull sret(%class.AssertionResult.24.249.299.1324.2349) %gtest_ar, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i64 0, i64 undef)
%tmp = load i8, i8* undef, align 4
%tobool.i = icmp eq i8 %tmp, 0
br i1 %tobool.i, label %if.else, label %if.end
@ -87,14 +87,14 @@ if.end: ; preds = %_ZN7MessageD1Ev.exi
%call.i.i.i = call %class.scoped_ptr.23.248.298.1323.2348* @_ZN10scoped_ptrI25Trans_NS___1_basic_stringIciiEED2Ev(%class.scoped_ptr.23.248.298.1323.2348* %message_.i.i)
call void @llvm.memset.p0i8.i32(i8* align 4 null, i8 0, i32 12, i1 false)
call void @_ZN25Trans_NS___1_basic_stringIciiE5m_fn2Ev(%class.Trans_NS___1_basic_string.18.243.293.1318.2343* nonnull %ref.tmp)
call void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* nonnull sret %agg.tmp16)
call void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* nonnull sret(%class.scoped_refptr.19.244.294.1319.2344) %agg.tmp16)
%callback_.i = getelementptr inbounds %class.TestCompletionCallback.9.234.284.1309.2334, %class.TestCompletionCallback.9.234.284.1309.2334* %callback, i32 0, i32 1
%pool_ = getelementptr inbounds %class.SOCKSClientSocketPoolTest_AsyncSOCKSConnectError_Test.1.226.276.1301.2326, %class.SOCKSClientSocketPoolTest_AsyncSOCKSConnectError_Test.1.226.276.1301.2326* %this, i32 0, i32 1
%tmp1 = getelementptr inbounds %class.BoundNetLog.20.245.295.1320.2345, %class.BoundNetLog.20.245.295.1320.2345* %agg.tmp18, i32 0, i32 0
store i32 0, i32* %tmp1, align 4
call void @_ZN18ClientSocketHandle5m_fn3IPiEEvRK25Trans_NS___1_basic_stringIciiE13scoped_refptr15RequestPriorityN16ClientSocketPool13RespectLimitsERiT_11BoundNetLog(%class.ClientSocketHandle.14.239.289.1314.2339* nonnull undef, %class.Trans_NS___1_basic_string.18.243.293.1318.2343* nonnull dereferenceable(12) %ref.tmp, %class.scoped_refptr.19.244.294.1319.2344* nonnull %agg.tmp16, i32 0, i32 1, i32* nonnull dereferenceable(4) %callback_.i, i32* %pool_, %class.BoundNetLog.20.245.295.1320.2345* nonnull %agg.tmp18)
%call19 = call %class.BoundNetLog.20.245.295.1320.2345* @_ZN11BoundNetLogD1Ev(%class.BoundNetLog.20.245.295.1320.2345* nonnull %agg.tmp18)
call void @_Z11CmpHelperEQPcS_xx(%class.AssertionResult.24.249.299.1324.2349* nonnull sret undef, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i64 -1, i64 0)
call void @_Z11CmpHelperEQPcS_xx(%class.AssertionResult.24.249.299.1324.2349* nonnull sret(%class.AssertionResult.24.249.299.1324.2349) undef, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i64 -1, i64 0)
br i1 undef, label %if.then.i.i.i.i, label %_ZN7MessageD1Ev.exit
if.then.i.i.i.i: ; preds = %if.end
@ -134,7 +134,7 @@ declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #0
declare void @_ZN18ClientSocketHandle5m_fn3IPiEEvRK25Trans_NS___1_basic_stringIciiE13scoped_refptr15RequestPriorityN16ClientSocketPool13RespectLimitsERiT_11BoundNetLog(%class.ClientSocketHandle.14.239.289.1314.2339*, %class.Trans_NS___1_basic_string.18.243.293.1318.2343* dereferenceable(12), %class.scoped_refptr.19.244.294.1319.2344*, i32, i32, i32* dereferenceable(4), i32*, %class.BoundNetLog.20.245.295.1320.2345*)
declare void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* sret)
declare void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* sret(%class.scoped_refptr.19.244.294.1319.2344))
; Function Attrs: argmemonly nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) #0

4
test/CodeGen/ARM/swifterror.ll
View File

@ -221,7 +221,7 @@ bb_end:
; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
; parameter.
define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
; CHECK-APPLE-LABEL: foo_sret:
; CHECK-APPLE: mov [[SRET:r[0-9]+]], r0
; CHECK-APPLE: mov r0, #16
@ -286,7 +286,7 @@ entry:
%s = alloca %struct.S, align 8
%error_ptr_ref = alloca swifterror %swift_error*
store %swift_error* null, %swift_error** %error_ptr_ref
call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
%error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
%had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
%tmp = bitcast %swift_error* %error_from_foo to i8*

6
test/CodeGen/ARM/vlddup.ll
View File

@ -222,7 +222,7 @@ define <8 x i8> @vld2dupi8(i8* %A) nounwind {
ret <8 x i8> %tmp5
}
define void @vld2dupi8_preinc(%struct.__neon_int8x8x2_t* noalias nocapture sret %agg.result, i8** noalias nocapture %a, i32 %b) nounwind {
define void @vld2dupi8_preinc(%struct.__neon_int8x8x2_t* noalias nocapture sret(%struct.__neon_int8x8x2_t) %agg.result, i8** noalias nocapture %a, i32 %b) nounwind {
;CHECK-LABEL: vld2dupi8_preinc:
;CHECK: vld2.8 {d16[], d17[]}, [r2]
entry:
@ -241,7 +241,7 @@ entry:
ret void
}
define void @vld2dupi8_postinc_fixed(%struct.__neon_int8x8x2_t* noalias nocapture sret %agg.result, i8** noalias nocapture %a) nounwind {
define void @vld2dupi8_postinc_fixed(%struct.__neon_int8x8x2_t* noalias nocapture sret(%struct.__neon_int8x8x2_t) %agg.result, i8** noalias nocapture %a) nounwind {
entry:
;CHECK-LABEL: vld2dupi8_postinc_fixed:
;CHECK: vld2.8 {d16[], d17[]}, [r2]!
@ -260,7 +260,7 @@ entry:
ret void
}
define void @vld2dupi8_postinc_variable(%struct.__neon_int8x8x2_t* noalias nocapture sret %agg.result, i8** noalias nocapture %a, i32 %n) nounwind {
define void @vld2dupi8_postinc_variable(%struct.__neon_int8x8x2_t* noalias nocapture sret(%struct.__neon_int8x8x2_t) %agg.result, i8** noalias nocapture %a, i32 %n) nounwind {
entry:
;CHECK-LABEL: vld2dupi8_postinc_variable:
;CHECK: vld2.8 {d16[], d17[]}, [r3], r2

4
test/CodeGen/ARM/vmov.ll
View File

@ -228,7 +228,7 @@ define arm_aapcs_vfpcc <2 x i64> @v_movQi64() nounwind {
; Check for correct assembler printing for immediate values.
%struct.int8x8_t = type { <8 x i8> }
define arm_aapcs_vfpcc void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
define arm_aapcs_vfpcc void @vdupn128(%struct.int8x8_t* noalias nocapture sret(%struct.int8x8_t) %agg.result) nounwind {
; CHECK-LABEL: vdupn128:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.i8 d16, #0x80
@ -240,7 +240,7 @@ entry:
ret void
}
define arm_aapcs_vfpcc void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
define arm_aapcs_vfpcc void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret(%struct.int8x8_t) %agg.result) nounwind {
; CHECK-LABEL: vdupnneg75:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.i8 d16, #0xb5

4
test/CodeGen/Hexagon/calling-conv-2.ll
View File

@ -3,9 +3,9 @@
%struct.test_struct = type { i32, i8, i64 }
; CHECK: r1 = #45
define void @foo(%struct.test_struct* noalias nocapture sret %agg.result, i32 %a) #0 {
define void @foo(%struct.test_struct* noalias nocapture sret(%struct.test_struct) %agg.result, i32 %a) #0 {
entry:
call void @bar(%struct.test_struct* sret %agg.result, i32 45) #0
call void @bar(%struct.test_struct* sret(%struct.test_struct) %agg.result, i32 45) #0
ret void
}

4
test/CodeGen/Hexagon/calling-conv.ll
View File

@ -11,7 +11,7 @@
; CHECK-TWO: memw(r29+#52) = r2
; CHECK-THREE: memw(r29+#56) = r2
define void @f0(%s.0* noalias nocapture sret %a0, i32 %a1, i8 zeroext %a2, %s.0* byval(%s.0) nocapture readnone align 8 %a3, %s.1* byval(%s.1) nocapture readnone align 8 %a4) #0 {
define void @f0(%s.0* noalias nocapture sret(%s.0) %a0, i32 %a1, i8 zeroext %a2, %s.0* byval(%s.0) nocapture readnone align 8 %a3, %s.1* byval(%s.1) nocapture readnone align 8 %a4) #0 {
b0:
%v0 = alloca %s.0, align 8
%v1 = load %s.0*, %s.0** @g0, align 4
@ -19,7 +19,7 @@ b0:
%v3 = add nsw i64 %v2, 1
%v4 = add nsw i32 %a1, 2
%v5 = add nsw i64 %v2, 3
call void @f1(%s.0* sret %v0, i32 45, %s.0* byval(%s.0) align 8 %v1, %s.0* byval(%s.0) align 8 %v1, i8 zeroext %a2, i64 %v3, i32 %v4, i64 %v5, i8 zeroext %a2, i8 zeroext %a2, i8 zeroext %a2, i32 45)
call void @f1(%s.0* sret(%s.0) %v0, i32 45, %s.0* byval(%s.0) align 8 %v1, %s.0* byval(%s.0) align 8 %v1, i8 zeroext %a2, i64 %v3, i32 %v4, i64 %v5, i8 zeroext %a2, i8 zeroext %a2, i8 zeroext %a2, i32 45)
%v6 = bitcast %s.0* %v0 to i32*
store i32 20, i32* %v6, align 8
%v7 = bitcast %s.0* %a0 to i8*

2
test/CodeGen/Hexagon/expand-condsets-pred-undef.ll
View File

@ -14,7 +14,7 @@ entry:
%inc = zext i1 %cmp104 to i32
%inc.r = add nsw i32 %inc, %r
%.inc.r = select i1 undef, i32 0, i32 %inc.r
tail call void @foo(%struct.0* sret %p, i8 zeroext %t, i32 %.inc.r, i64 undef)
tail call void @foo(%struct.0* sret(%struct.0) %p, i8 zeroext %t, i32 %.inc.r, i64 undef)
ret void
}

16
test/CodeGen/Hexagon/regscavengerbug.ll
View File

@ -98,7 +98,7 @@ b3: ; preds = %b0
%v50 = load double, double* %v41, align 8, !tbaa !6
%v51 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2
store double %v50, double* %v51, align 8, !tbaa !6
call void @f0(%3* sret %v2, %0* %v3, %3* %v24)
call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v24)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v25, i8* align 8 %v42, i32 24, i1 false)
%v52 = load double, double* %v39, align 8, !tbaa !6
%v53 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0
@ -110,7 +110,7 @@ b3: ; preds = %b0
%v57 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 1, i32 0, i32 2
store double %v56, double* %v57, align 8, !tbaa !6
%v58 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 1
call void @f0(%3* sret %v2, %0* %v3, %3* %v58)
call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v58)
%v59 = bitcast %3* %v58 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v59, i8* align 8 %v42, i32 24, i1 false)
%v60 = load double, double* %v39, align 8, !tbaa !6
@ -123,7 +123,7 @@ b3: ; preds = %b0
%v65 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 2
store double %v64, double* %v65, align 8, !tbaa !6
%v66 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 1, i32 0
call void @f0(%3* sret %v2, %0* %v3, %3* %v66)
call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v66)
%v67 = bitcast %3* %v66 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v67, i8* align 8 %v42, i32 24, i1 false)
%v68 = load double, double* %v39, align 8, !tbaa !6
@ -136,7 +136,7 @@ b3: ; preds = %b0
%v73 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 1, i32 1, i32 0, i32 2
store double %v72, double* %v73, align 8, !tbaa !6
%v74 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 1, i32 1
call void @f0(%3* sret %v2, %0* %v3, %3* %v74)
call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v74)
%v75 = bitcast %3* %v74 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v75, i8* align 8 %v42, i32 24, i1 false)
%v76 = load double, double* %v45, align 8, !tbaa !6
@ -149,7 +149,7 @@ b3: ; preds = %b0
%v81 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 2
store double %v80, double* %v81, align 8, !tbaa !6
%v82 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 0, i32 0
call void @f0(%3* sret %v2, %0* %v3, %3* %v82)
call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v82)
%v83 = bitcast %3* %v82 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v83, i8* align 8 %v42, i32 24, i1 false)
%v84 = load double, double* %v45, align 8, !tbaa !6
@ -162,7 +162,7 @@ b3: ; preds = %b0
%v89 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 2
store double %v88, double* %v89, align 8, !tbaa !6
%v90 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 0, i32 1
call void @f0(%3* sret %v2, %0* %v3, %3* %v90)
call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v90)
%v91 = bitcast %3* %v90 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v91, i8* align 8 %v42, i32 24, i1 false)
%v92 = load double, double* %v45, align 8, !tbaa !6
@ -175,7 +175,7 @@ b3: ; preds = %b0
%v97 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 1, i32 0, i32 0, i32 2
store double %v96, double* %v97, align 8, !tbaa !6
%v98 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 1, i32 0
call void @f0(%3* sret %v2, %0* %v3, %3* %v98)
call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v98)
%v99 = bitcast %3* %v98 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v99, i8* align 8 %v42, i32 24, i1 false)
%v100 = load double, double* %v45, align 8, !tbaa !6
@ -188,7 +188,7 @@ b3: ; preds = %b0
%v105 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 1, i32 1, i32 0, i32 2
store double %v104, double* %v105, align 8, !tbaa !6
%v106 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 1, i32 1
call void @f0(%3* sret %v2, %0* %v3, %3* %v106)
call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v106)
%v107 = bitcast %3* %v106 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v107, i8* align 8 %v42, i32 24, i1 false)
%v108 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0

2
test/CodeGen/Hexagon/tail-dup-subreg-map.ll
View File

@ -14,7 +14,7 @@ target triple = "hexagon"
declare hidden fastcc void @foo(%struct.0* noalias nocapture, i8 signext, i8 zeroext, i32, i64, i64) unnamed_addr #0
define void @fred(%struct.0* noalias nocapture sret %agg.result, %struct.1* byval(%struct.1) nocapture readonly align 8 %a, i32 %a0) #1 {
define void @fred(%struct.0* noalias nocapture sret(%struct.0) %agg.result, %struct.1* byval(%struct.1) nocapture readonly align 8 %a, i32 %a0) #1 {
entry:
%0 = load i64, i64* undef, align 8
switch i32 %a0, label %if.else [

2
test/CodeGen/MIR/X86/diexpr-win32.mir
View File

@ -67,7 +67,7 @@
%struct.string = type { i32, i32, i8* }
define void @fun(%struct.string* noalias sret %agg.result, %struct.string* noalias %str) !dbg !12 {
define void @fun(%struct.string* noalias sret(%struct.string) %agg.result, %struct.string* noalias %str) !dbg !12 {
entry:
call void @llvm.dbg.value(metadata %struct.string* %agg.result, metadata !23, metadata !24), !dbg !25
call void @llvm.dbg.value(metadata %struct.string* %str, metadata !26, metadata !28), !dbg !25

4
test/CodeGen/MSP430/struct-return.ll
View File

@ -31,11 +31,11 @@ define void @test() #1 {
%1 = alloca %struct.S, align 2
; CHECK: mov r1, r12
; CHECK-NEXT: call #sret
call void @sret(%struct.S* nonnull sret %1) #3
call void @sret(%struct.S* nonnull sret(%struct.S) %1) #3
ret void
}
define void @sret(%struct.S* noalias nocapture sret) #0 {
define void @sret(%struct.S* noalias nocapture sret(%struct.S)) #0 {
; CHECK-LABEL: sret:
; CHECK: mov &a, 0(r12)
; CHECK: mov &b, 2(r12)

2
test/CodeGen/Mips/2008-07-03-SRet.ll
View File

@ -2,7 +2,7 @@
%struct.sret0 = type { i32, i32, i32 }
define void @test0(%struct.sret0* noalias sret %agg.result, i32 %dummy) nounwind {
define void @test0(%struct.sret0* noalias sret(%struct.sret0) %agg.result, i32 %dummy) nounwind {
entry:
; CHECK: sw ${{[0-9]+}}, {{[0-9]+}}($4)
; CHECK: sw ${{[0-9]+}}, {{[0-9]+}}($4)

6
test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
View File

@ -3,7 +3,7 @@
%struct.S = type { i32, i32 }
define void @ZeroInit(%struct.S* noalias sret %agg.result) {
define void @ZeroInit(%struct.S* noalias sret(%struct.S) %agg.result) {
; MIPS32-LABEL: name: ZeroInit
; MIPS32: bb.1.entry:
; MIPS32: liveins: $a0
@ -23,7 +23,7 @@ entry:
ret void
}
define void @CallZeroInit(%struct.S* noalias sret %agg.result) {
define void @CallZeroInit(%struct.S* noalias sret(%struct.S) %agg.result) {
; MIPS32-LABEL: name: CallZeroInit
; MIPS32: bb.1.entry:
; MIPS32: liveins: $a0
@ -34,6 +34,6 @@ define void @CallZeroInit(%struct.S* noalias sret %agg.result) {
; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; MIPS32: RetRA
entry:
call void @ZeroInit(%struct.S* sret %agg.result)
call void @ZeroInit(%struct.S* sret(%struct.S) %agg.result)
ret void
}

6
test/CodeGen/Mips/GlobalISel/llvm-ir/sret_pointer.ll
View File

@ -3,7 +3,7 @@
%struct.S = type { i32, i32 }
define void @ZeroInit(%struct.S* noalias sret %agg.result) {
define void @ZeroInit(%struct.S* noalias sret(%struct.S) %agg.result) {
; MIPS32-LABEL: ZeroInit:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: ori $1, $zero, 0
@ -19,7 +19,7 @@ entry:
ret void
}
define void @CallZeroInit(%struct.S* noalias sret %agg.result) {
define void @CallZeroInit(%struct.S* noalias sret(%struct.S) %agg.result) {
; MIPS32-LABEL: CallZeroInit:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: addiu $sp, $sp, -24
@ -33,6 +33,6 @@ define void @CallZeroInit(%struct.S* noalias sret %agg.result) {
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
call void @ZeroInit(%struct.S* sret %agg.result)
call void @ZeroInit(%struct.S* sret(%struct.S) %agg.result)
ret void
}

2
test/CodeGen/Mips/cconv/return-struct.ll
View File

@ -149,7 +149,7 @@ entry:
; Ensure that large structures (>128-bit) are returned indirectly.
; We pick an extremely large structure so we don't have to match inlined memcpy's.
define void @ret_struct_128xi16({[128 x i16]}* sret %returnval) {
define void @ret_struct_128xi16({[128 x i16]}* sret({[128 x i16]}) %returnval) {
entry:
%0 = bitcast {[128 x i16]}* %returnval to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 2 %0, i8* align 2 bitcast ({[128 x i16]}* @struct_128xi16 to i8*), i64 256, i1 false)

4
test/CodeGen/Mips/fastcc_byval.ll
View File

@ -5,7 +5,7 @@
%struct.str = type { i32, i32, [3 x i32*] }
declare fastcc void @_Z1F3str(%struct.str* noalias nocapture sret %agg.result, %struct.str* byval(%struct.str) nocapture readonly align 4 %s)
declare fastcc void @_Z1F3str(%struct.str* noalias nocapture sret(%struct.str) %agg.result, %struct.str* byval(%struct.str) nocapture readonly align 4 %s)
define i32 @_Z1g3str(%struct.str* byval(%struct.str) nocapture readonly align 4 %s) {
; CHECK-LABEL: _Z1g3str:
@ -15,7 +15,7 @@ entry:
%ref.tmp = alloca %struct.str, align 4
%0 = bitcast %struct.str* %ref.tmp to i8*
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %0)
call fastcc void @_Z1F3str(%struct.str* nonnull sret %ref.tmp, %struct.str* byval(%struct.str) nonnull align 4 %s)
call fastcc void @_Z1F3str(%struct.str* nonnull sret(%struct.str) %ref.tmp, %struct.str* byval(%struct.str) nonnull align 4 %s)
%cl.sroa.3.0..sroa_idx2 = getelementptr inbounds %struct.str, %struct.str* %ref.tmp, i32 0, i32 1
%cl.sroa.3.0.copyload = load i32, i32* %cl.sroa.3.0..sroa_idx2, align 4
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %0)

4
test/CodeGen/Mips/mips64-sret.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi=n64 < %s | FileCheck %s
define void @foo(i32* noalias sret %agg.result) nounwind {
define void @foo(i32* noalias sret(i32) %agg.result) nounwind {
entry:
; CHECK-LABEL: foo:
; CHECK: sw {{.*}}, 0($4)
@ -11,7 +11,7 @@ entry:
ret void
}
define void @bar(i32 signext %v, i32* noalias sret %agg.result) nounwind {
define void @bar(i32 signext %v, i32* noalias sret(i32) %agg.result) nounwind {
entry:
; CHECK-LABEL: bar:
; CHECK: sw $4, 0($5)

2
test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret({ ppc_fp128, ppc_fp128 }) %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
entry:
%imag59 = load ppc_fp128, ppc_fp128* null, align 8 ; <ppc_fp128> [#uses=1]
%0 = fmul ppc_fp128 0xM00000000000000000000000000000000, %imag59 ; <ppc_fp128> [#uses=1]

2
test/CodeGen/PowerPC/2008-12-02-LegalizeTypeAssert.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu.5
define void @__multc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
define void @__multc3({ ppc_fp128, ppc_fp128 }* noalias sret({ ppc_fp128, ppc_fp128 }) %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
entry:
%.pre139 = and i1 false, false ; <i1> [#uses=1]
br i1 false, label %bb6, label %bb21

4
test/CodeGen/PowerPC/MMO-flags-assertion.ll
View File

@ -7,7 +7,7 @@ declare void @_Z3fn11F(%class.F* byval(%class.F) align 8) local_unnamed_addr
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
declare signext i32 @_ZN1F11isGlobalRegEv(%class.F*) local_unnamed_addr
declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
declare void @_Z10EmitLValuev(%class.F* sret) local_unnamed_addr
declare void @_Z10EmitLValuev(%class.F* sret(%class.F)) local_unnamed_addr
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
%class.F = type { i32, i64, i8, [64 x i8], i8, i32* }
@ -25,7 +25,7 @@ entry:
%XLValue = alloca %class.F, align 8
%0 = bitcast %class.F* %XLValue to i8*
call void @llvm.lifetime.start.p0i8(i64 96, i8* nonnull %0)
call void @_Z10EmitLValuev(%class.F* nonnull sret %XLValue)
call void @_Z10EmitLValuev(%class.F* nonnull sret(%class.F) %XLValue)
%1 = bitcast %class.F* %agg.tmp1 to i8*
call void @llvm.lifetime.start.p0i8(i64 96, i8* nonnull %1)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 nonnull %1, i8* align 8 nonnull %0, i64 96, i1 false)

2
test/CodeGen/PowerPC/a2-fp-basic.ll
View File

@ -2,7 +2,7 @@
%0 = type { double, double }
define void @maybe_an_fma(%0* sret %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
define void @maybe_an_fma(%0* sret(%0) %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
entry:
%a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0
%a.real = load double, double* %a.realp

8
test/CodeGen/PowerPC/aix-sret-param.ll
View File

@ -18,19 +18,19 @@
define void @test1() {
entry:
%s = alloca %struct.S, align 4
call void @foo(%struct.S* sret %s)
call void @foo(%struct.S* sret(%struct.S) %s)
ret void
}
define void @test2() {
entry:
%t = alloca %struct.T, align 8
call void @bar(%struct.T* sret %t)
call void @bar(%struct.T* sret(%struct.T) %t)
ret void
}
declare void @foo(%struct.S* sret)
declare void @bar(%struct.T* sret)
declare void @foo(%struct.S* sret(%struct.S))
declare void @bar(%struct.T* sret(%struct.T))
; MIR: name: test1
; MIR: stack:

6
test/CodeGen/PowerPC/emptystruct.ll
View File

@ -14,7 +14,7 @@ target triple = "powerpc64-unknown-linux-gnu"
%struct.empty = type {}
define void @callee(%struct.empty* noalias sret %agg.result, %struct.empty* byval(%struct.empty) %a1, %struct.empty* %a2, %struct.empty* byval(%struct.empty) %a3) nounwind {
define void @callee(%struct.empty* noalias sret(%struct.empty) %agg.result, %struct.empty* byval(%struct.empty) %a1, %struct.empty* %a2, %struct.empty* byval(%struct.empty) %a3) nounwind {
entry:
%a2.addr = alloca %struct.empty*, align 8
store %struct.empty* %a2, %struct.empty** %a2.addr, align 8
@ -33,12 +33,12 @@ entry:
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
define void @caller(%struct.empty* noalias sret %agg.result) nounwind {
define void @caller(%struct.empty* noalias sret(%struct.empty) %agg.result) nounwind {
entry:
%e1 = alloca %struct.empty, align 1
%e2 = alloca %struct.empty, align 1
%e3 = alloca %struct.empty, align 1
call void @callee(%struct.empty* sret %agg.result, %struct.empty* byval(%struct.empty) %e1, %struct.empty* %e2, %struct.empty* byval(%struct.empty) %e3)
call void @callee(%struct.empty* sret(%struct.empty) %agg.result, %struct.empty* byval(%struct.empty) %e1, %struct.empty* %e2, %struct.empty* byval(%struct.empty) %e3)
ret void
}

2
test/CodeGen/PowerPC/fsl-e500mc.ll
View File

@ -9,7 +9,7 @@ target triple = "powerpc-fsl-linux"
%struct.teststruct = type { [12 x i32], i32 }
define void @copy(%struct.teststruct* noalias nocapture sret %agg.result, %struct.teststruct* nocapture %in) nounwind {
define void @copy(%struct.teststruct* noalias nocapture sret(%struct.teststruct) %agg.result, %struct.teststruct* nocapture %in) nounwind {
entry:
; CHECK: @copy
; CHECK-NOT: bl memcpy

2
test/CodeGen/PowerPC/fsl-e5500.ll
View File

@ -9,7 +9,7 @@ target triple = "powerpc64-fsl-linux"
%struct.teststruct = type { [24 x i32], i32 }
define void @copy(%struct.teststruct* noalias nocapture sret %agg.result, %struct.teststruct* nocapture %in) nounwind {
define void @copy(%struct.teststruct* noalias nocapture sret(%struct.teststruct) %agg.result, %struct.teststruct* nocapture %in) nounwind {
entry:
; CHECK: @copy
; CHECK-NOT: bl memcpy

2
test/CodeGen/PowerPC/ppc-empty-fs.ll
View File

@ -8,7 +8,7 @@ target triple = "powerpc64-unknown-linux-gnu"
%struct.fab = type { float, float }
; Function Attrs: nounwind
define void @func_fab(%struct.fab* noalias sret %agg.result, i64 %x.coerce) #0 {
define void @func_fab(%struct.fab* noalias sret(%struct.fab) %agg.result, i64 %x.coerce) #0 {
entry:
%x = alloca %struct.fab, align 8
%0 = bitcast %struct.fab* %x to i64*

2
test/CodeGen/PowerPC/ppc440-fp-basic.ll
View File

@ -2,7 +2,7 @@
%0 = type { double, double }
define void @maybe_an_fma(%0* sret %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
define void @maybe_an_fma(%0* sret(%0) %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
entry:
%a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0
%a.real = load double, double* %a.realp

12
test/CodeGen/PowerPC/ppc64-sibcall.ll
View File

@ -87,15 +87,15 @@ entry:
; Struct return test
; Function Attrs: noinline nounwind
define void @callee_sret_56(%S_56* noalias sret %agg.result) #0 { ret void }
define void @callee_sret_32(%S_32* noalias sret %agg.result) #0 { ret void }
define void @callee_sret_56(%S_56* noalias sret(%S_56) %agg.result) #0 { ret void }
define void @callee_sret_32(%S_32* noalias sret(%S_32) %agg.result) #0 { ret void }
; Function Attrs: nounwind
define void @caller_do_something_sret_32(%S_32* noalias sret %agg.result) #1 {
define void @caller_do_something_sret_32(%S_32* noalias sret(%S_32) %agg.result) #1 {
%1 = alloca %S_56, align 4
%2 = bitcast %S_56* %1 to i8*
call void @callee_sret_56(%S_56* nonnull sret %1)
tail call void @callee_sret_32(%S_32* sret %agg.result)
call void @callee_sret_56(%S_56* nonnull sret(%S_56) %1)
tail call void @callee_sret_32(%S_32* sret(%S_32) %agg.result)
ret void
; CHECK-SCO-LABEL: caller_do_something_sret_32:
@ -107,7 +107,7 @@ define void @caller_do_something_sret_32(%S_32* noalias sret %agg.result) #1 {
define void @caller_local_sret_32(%S_32* %a) #1 {
%tmp = alloca %S_32, align 4
tail call void @callee_sret_32(%S_32* nonnull sret %tmp)
tail call void @callee_sret_32(%S_32* nonnull sret(%S_32) %tmp)
ret void
; CHECK-SCO-LABEL: caller_local_sret_32:

2
test/CodeGen/PowerPC/ppc64-smallarg.ll
View File

@ -28,7 +28,7 @@ entry:
define void @caller1() {
entry:
%tmp = alloca %struct.small_arg, align 2
call void @test1(%struct.small_arg* sret %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
call void @test1(%struct.small_arg* sret(%struct.small_arg) %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
ret void
}
; CHECK: @caller1

4
test/CodeGen/PowerPC/ppc64le-smallarg.ll
View File

@ -13,7 +13,7 @@ target triple = "powerpc64le-unknown-linux-gnu"
@gs = common global %struct.small_arg zeroinitializer, align 2
@gf = common global float 0.000000e+00, align 4
define void @callee1(%struct.small_arg* noalias nocapture sret %agg.result, %struct.large_arg* byval(%struct.large_arg) nocapture readnone %pad, %struct.small_arg* byval(%struct.small_arg) nocapture readonly %x) {
define void @callee1(%struct.small_arg* noalias nocapture sret(%struct.small_arg) %agg.result, %struct.large_arg* byval(%struct.large_arg) nocapture readnone %pad, %struct.small_arg* byval(%struct.small_arg) nocapture readonly %x) {
entry:
%0 = bitcast %struct.small_arg* %x to i32*
%1 = bitcast %struct.small_arg* %agg.result to i32*
@ -28,7 +28,7 @@ entry:
define void @caller1() {
entry:
%tmp = alloca %struct.small_arg, align 2
call void @test1(%struct.small_arg* sret %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
call void @test1(%struct.small_arg* sret(%struct.small_arg) %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
ret void
}
; CHECK: @caller1

4
test/CodeGen/PowerPC/pr17354.ll
View File

@ -14,7 +14,7 @@ target triple = "powerpc64-unknown-linux-gnu"
define internal void @__cxx_global_var_init() section ".text.startup" {
entry:
call void @_Z4funcv(%struct.CS* sret getelementptr inbounds ([1 x %struct.CS], [1 x %struct.CS]* @_ZL3glb, i64 0, i64 0))
call void @_Z4funcv(%struct.CS* sret(%struct.CS) getelementptr inbounds ([1 x %struct.CS], [1 x %struct.CS]* @_ZL3glb, i64 0, i64 0))
ret void
}
@ -23,7 +23,7 @@ entry:
; CHECK-NEXT: nop
; Function Attrs: nounwind
define void @_Z4funcv(%struct.CS* noalias sret %agg.result) #0 {
define void @_Z4funcv(%struct.CS* noalias sret(%struct.CS) %agg.result) #0 {
entry:
%a_ = getelementptr inbounds %struct.CS, %struct.CS* %agg.result, i32 0, i32 0
store i32 0, i32* %a_, align 4

2
test/CodeGen/PowerPC/pr18663.ll
View File

@ -59,7 +59,7 @@
%struct.TriaNumberCache.52.52 = type { %struct.TriaNumberCache.53.51, i32, %"class.std::vector.12.15", i32, %"class.std::vector.12.15" }
%struct.TriaNumberCache.53.51 = type { i32, %"class.std::vector.12.15", i32, %"class.std::vector.12.15" }
define void @_ZNK18TriaObjectAccessorILi3ELi3EE10barycenterEv(%class.Point.1* noalias nocapture sret %agg.result, %class.TriaObjectAccessor.57* %this) #0 align 2 {
define void @_ZNK18TriaObjectAccessorILi3ELi3EE10barycenterEv(%class.Point.1* noalias nocapture sret(%class.Point.1) %agg.result, %class.TriaObjectAccessor.57* %this) #0 align 2 {
entry:
%0 = load double, double* null, align 8
%1 = load double, double* undef, align 8

2
test/CodeGen/PowerPC/resolvefi-basereg.ll
View File

@ -332,7 +332,7 @@ if.end: ; preds = %if.then, %entry
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %62, i8* align 16 bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i1 false)
%63 = bitcast %struct.S1998* %agg.tmp112 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %63, i8* align 16 bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i1 false)
call void @check1998(%struct.S1998* sret %agg.tmp, %struct.S1998* byval(%struct.S1998) align 16 %agg.tmp111, %struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 1), %struct.S1998* byval(%struct.S1998) align 16 %agg.tmp112)
call void @check1998(%struct.S1998* sret(%struct.S1998) %agg.tmp, %struct.S1998* byval(%struct.S1998) align 16 %agg.tmp111, %struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 1), %struct.S1998* byval(%struct.S1998) align 16 %agg.tmp112)
call void @checkx1998(%struct.S1998* byval(%struct.S1998) align 16 %agg.tmp)
%64 = bitcast %struct.S1998* %agg.tmp113 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %64, i8* align 16 bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i1 false)

2
test/CodeGen/PowerPC/resolvefi-disp.ll
View File

@ -20,7 +20,7 @@ target triple = "powerpc64le-unknown-linux-gnu"
@s2760 = external global %struct.S2760
@fails = external global i32
define void @check2760(%struct.S2760* noalias sret %agg.result, %struct.S2760* byval(%struct.S2760) align 16, %struct.S2760* %arg1, %struct.S2760* byval(%struct.S2760) align 16) {
define void @check2760(%struct.S2760* noalias sret(%struct.S2760) %agg.result, %struct.S2760* byval(%struct.S2760) align 16, %struct.S2760* %arg1, %struct.S2760* byval(%struct.S2760) align 16) {
entry:
%arg0 = alloca %struct.S2760, align 32
%arg2 = alloca %struct.S2760, align 32

10
test/CodeGen/PowerPC/tailcall-string-rvo.ll
View File

@ -16,15 +16,15 @@ target triple = "powerpc64le-linux-gnu"
%"struct.__gnu_cxx::__vstring_utility<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider.7.38.69" = type { i8* }
%union.anon.8.39.70 = type { i64, [8 x i8] }
declare void @TestBaz(%class.basic_string.11.42.73* noalias sret %arg)
declare void @TestBaz(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
define void @TestBar(%class.basic_string.11.42.73* noalias sret %arg) {
define void @TestBar(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg) {
bb:
call void @TestBaz(%class.basic_string.11.42.73* noalias sret %arg)
call void @TestBaz(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
ret void
}
define void @TestFoo(%class.basic_string.11.42.73* noalias sret %arg) {
define void @TestFoo(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg) {
; CHECK-LABEL: TestFoo:
; CHECK: #TC_RETURNd8 TestBar 0
bb:
@ -37,7 +37,7 @@ bb:
store i64 13, i64* %tmp3, align 8
%tmp4 = getelementptr inbounds %class.basic_string.11.42.73, %class.basic_string.11.42.73* %arg, i64 0, i32 0, i32 0, i32 2, i32 1, i64 5
store i8 0, i8* %tmp4, align 1
tail call void @TestBar(%class.basic_string.11.42.73* noalias sret %arg)
tail call void @TestBar(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
ret void
}

4
test/CodeGen/PowerPC/toc-load-sched-bug.ll
View File

@ -184,7 +184,7 @@ entry:
%2 = load i64, i64* %_M_length.i.i, align 8, !tbaa !7
%.fca.0.insert18 = insertvalue [2 x i64] undef, i64 %1, 0
%.fca.1.insert21 = insertvalue [2 x i64] %.fca.0.insert18, i64 %2, 1
call void @_ZN4llvm12MemoryBuffer14getFileOrSTDINENS_9StringRefEl(%"class.llvm::ErrorOr"* sret %FileOrErr, [2 x i64] %.fca.1.insert21, i64 -1) #3
call void @_ZN4llvm12MemoryBuffer14getFileOrSTDINENS_9StringRefEl(%"class.llvm::ErrorOr"* sret(%"class.llvm::ErrorOr") %FileOrErr, [2 x i64] %.fca.1.insert21, i64 -1) #3
%HasError.i24 = getelementptr inbounds %"class.llvm::ErrorOr", %"class.llvm::ErrorOr"* %FileOrErr, i64 0, i32 1
%bf.load.i25 = load i8, i8* %HasError.i24, align 8
%3 = and i8 %bf.load.i25, 1
@ -211,7 +211,7 @@ if.then: ; preds = %_ZNK4llvm7ErrorOrIS
%vtable.i = load void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)**, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*** %6, align 8, !tbaa !11
%vfn.i = getelementptr inbounds void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)** %vtable.i, i64 3
%7 = load void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)** %vfn.i, align 8
call void %7(%"class.std::basic_string"* sret %ref.tmp5, %"class.std::error_category"* %.c, i32 signext %phitmp) #3
call void %7(%"class.std::basic_string"* sret(%"class.std::basic_string") %ref.tmp5, %"class.std::error_category"* %.c, i32 signext %phitmp) #3
%call2.i.i = call dereferenceable(8) %"class.std::basic_string"* @_ZNSs6insertEmPKcm(%"class.std::basic_string"* %ref.tmp5, i64 0, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i64 27) #3
%_M_p2.i.i.i.i = getelementptr inbounds %"class.std::basic_string", %"class.std::basic_string"* %call2.i.i, i64 0, i32 0, i32 0
%8 = load i8*, i8** %_M_p2.i.i.i.i, align 8, !tbaa !13

4
test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
View File

@ -331,7 +331,7 @@ entry:
ret <8 x i16> %1
}
define void @test16elt(<16 x i16>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lvx v5, 0, r4
@ -979,7 +979,7 @@ entry:
ret <8 x i16> %1
}
define void @test16elt_signed(<16 x i16>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lvx v5, 0, r4

12
test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
View File

@ -41,7 +41,7 @@ entry:
ret <2 x i64> %1
}
define void @test4elt(<4 x i64>* noalias nocapture sret %agg.result, <4 x float> %a) local_unnamed_addr #1 {
define void @test4elt(<4 x i64>* noalias nocapture sret(<4 x i64>) %agg.result, <4 x float> %a) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: xxmrglw vs0, v2, v2
@ -86,7 +86,7 @@ entry:
ret void
}
define void @test8elt(<8 x i64>* noalias nocapture sret %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -166,7 +166,7 @@ entry:
ret void
}
define void @test16elt(<16 x i64>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r7, 48
@ -340,7 +340,7 @@ entry:
ret <2 x i64> %1
}
define void @test4elt_signed(<4 x i64>* noalias nocapture sret %agg.result, <4 x float> %a) local_unnamed_addr #1 {
define void @test4elt_signed(<4 x i64>* noalias nocapture sret(<4 x i64>) %agg.result, <4 x float> %a) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: xxmrglw vs0, v2, v2
@ -385,7 +385,7 @@ entry:
ret void
}
define void @test8elt_signed(<8 x i64>* noalias nocapture sret %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -465,7 +465,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x i64>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt_signed(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r7, 48

4
test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
View File

@ -290,7 +290,7 @@ entry:
ret <8 x i16> %1
}
define void @test16elt(<16 x i16>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -853,7 +853,7 @@ entry:
ret <8 x i16> %1
}
define void @test16elt_signed(<16 x i16>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16

8
test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
View File

@ -97,7 +97,7 @@ entry:
ret <4 x i32> %1
}
define void @test8elt(<8 x i32>* noalias nocapture sret %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32
@ -171,7 +171,7 @@ entry:
ret void
}
define void @test16elt(<16 x i32>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32
@ -389,7 +389,7 @@ entry:
ret <4 x i32> %1
}
define void @test8elt_signed(<8 x i32>* noalias nocapture sret %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32
@ -463,7 +463,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x i32>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt_signed(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32

8
test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
View File

@ -60,7 +60,7 @@ entry:
ret <4 x i32> %0
}
define void @test8elt(<8 x i32>* noalias nocapture sret %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -98,7 +98,7 @@ entry:
ret void
}
define void @test16elt(<16 x i32>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -207,7 +207,7 @@ entry:
ret <4 x i32> %0
}
define void @test8elt_signed(<8 x i32>* noalias nocapture sret %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -245,7 +245,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x i32>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt_signed(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16

12
test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
View File

@ -29,7 +29,7 @@ entry:
ret <2 x i64> %0
}
define void @test4elt(<4 x i64>* noalias nocapture sret %agg.result, <4 x double>* nocapture readonly) local_unnamed_addr #1 {
define void @test4elt(<4 x i64>* noalias nocapture sret(<4 x i64>) %agg.result, <4 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -67,7 +67,7 @@ entry:
ret void
}
define void @test8elt(<8 x i64>* noalias nocapture sret %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #1 {
define void @test8elt(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -125,7 +125,7 @@ entry:
ret void
}
define void @test16elt(<16 x i64>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #1 {
define void @test16elt(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -243,7 +243,7 @@ entry:
ret <2 x i64> %0
}
define void @test4elt_signed(<4 x i64>* noalias nocapture sret %agg.result, <4 x double>* nocapture readonly) local_unnamed_addr #1 {
define void @test4elt_signed(<4 x i64>* noalias nocapture sret(<4 x i64>) %agg.result, <4 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -281,7 +281,7 @@ entry:
ret void
}
define void @test8elt_signed(<8 x i64>* noalias nocapture sret %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #1 {
define void @test8elt_signed(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -339,7 +339,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x i64>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #1 {
define void @test16elt_signed(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16

8
test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
View File

@ -110,7 +110,7 @@ entry:
ret <4 x float> %1
}
define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: xxlxor v3, v3, v3
@ -156,7 +156,7 @@ entry:
ret void
}
define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_0@toc@ha
@ -342,7 +342,7 @@ entry:
ret <4 x float> %1
}
define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: vmrglh v4, v2, v2
@ -393,7 +393,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16

12
test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
View File

@ -48,7 +48,7 @@ entry:
ret <2 x double> %1
}
define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI1_0@toc@ha
@ -112,7 +112,7 @@ entry:
ret void
}
define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI2_0@toc@ha
@ -212,7 +212,7 @@ entry:
ret void
}
define void @test16elt(<16 x double>* noalias nocapture sret %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r6, r2, .LCPI3_2@toc@ha
@ -407,7 +407,7 @@ entry:
ret <2 x double> %1
}
define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI5_0@toc@ha
@ -481,7 +481,7 @@ entry:
ret void
}
define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_2@toc@ha
@ -599,7 +599,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x double>* noalias nocapture sret %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_0@toc@ha

12
test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
View File

@ -38,7 +38,7 @@ entry:
ret <2 x double> %1
}
define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, <4 x i32> %a) local_unnamed_addr #1 {
define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, <4 x i32> %a) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: xxmrglw v3, v2, v2
@ -77,7 +77,7 @@ entry:
ret void
}
define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -145,7 +145,7 @@ entry:
ret void
}
define void @test16elt(<16 x double>* noalias nocapture sret %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -292,7 +292,7 @@ entry:
ret <2 x double> %1
}
define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, <4 x i32> %a) local_unnamed_addr #1 {
define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, <4 x i32> %a) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: xxmrglw v3, v2, v2
@ -331,7 +331,7 @@ entry:
ret void
}
define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -399,7 +399,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x double>* noalias nocapture sret %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16

8
test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
View File

@ -98,7 +98,7 @@ entry:
ret <4 x float> %1
}
define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32
@ -172,7 +172,7 @@ entry:
ret void
}
define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32
@ -391,7 +391,7 @@ entry:
ret <4 x float> %1
}
define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32
@ -465,7 +465,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32

8
test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
View File

@ -116,7 +116,7 @@ entry:
ret <4 x float> %1
}
define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #2 {
define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, i64 %a.coerce) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_0@toc@ha
@ -178,7 +178,7 @@ entry:
ret void
}
define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #3 {
define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i8> %a) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_0@toc@ha
@ -384,7 +384,7 @@ entry:
ret <4 x float> %1
}
define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, i64 %a.coerce) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha
@ -454,7 +454,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #3 {
define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i8> %a) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_0@toc@ha

12
test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
View File

@ -48,7 +48,7 @@ entry:
ret <2 x double> %1
}
define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, i32 %a.coerce) local_unnamed_addr #1 {
define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI1_0@toc@ha
@ -112,7 +112,7 @@ entry:
ret void
}
define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_0@toc@ha
@ -216,7 +216,7 @@ entry:
ret void
}
define void @test16elt(<16 x double>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #2 {
define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i8> %a) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_0@toc@ha
@ -440,7 +440,7 @@ entry:
ret <2 x double> %1
}
define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, i32 %a.coerce) local_unnamed_addr #1 {
define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI5_0@toc@ha
@ -514,7 +514,7 @@ entry:
ret void
}
define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha
@ -636,7 +636,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x double>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #2 {
define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i8> %a) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_0@toc@ha

8
test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
View File

@ -60,7 +60,7 @@ entry:
ret <4 x float> %0
}
define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -98,7 +98,7 @@ entry:
ret void
}
define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -207,7 +207,7 @@ entry:
ret <4 x float> %0
}
define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -245,7 +245,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16

12
test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
View File

@ -29,7 +29,7 @@ entry:
ret <2 x double> %0
}
define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, <4 x i64>* nocapture readonly) local_unnamed_addr #1 {
define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, <4 x i64>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -67,7 +67,7 @@ entry:
ret void
}
define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #1 {
define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -125,7 +125,7 @@ entry:
ret void
}
define void @test16elt(<16 x double>* noalias nocapture sret %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #1 {
define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -243,7 +243,7 @@ entry:
ret <2 x double> %0
}
define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, <4 x i64>* nocapture readonly) local_unnamed_addr #1 {
define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, <4 x i64>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -281,7 +281,7 @@ entry:
ret void
}
define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #1 {
define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
@ -339,7 +339,7 @@ entry:
ret void
}
define void @test16elt_signed(<16 x double>* noalias nocapture sret %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #1 {
define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16

4
test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
View File

@ -939,7 +939,7 @@ define void @caller_large_scalar_ret() nounwind {
; Check return of >2x xlen structs
define void @callee_large_struct_ret(%struct.large* noalias sret %agg.result) nounwind {
define void @callee_large_struct_ret(%struct.large* noalias sret(%struct.large) %agg.result) nounwind {
; RV32I-FPELIM-LABEL: callee_large_struct_ret:
; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: addi a1, zero, 1
@ -1011,7 +1011,7 @@ define i32 @caller_large_struct_ret() nounwind {
; RV32I-WITHFP-NEXT: addi sp, sp, 32
; RV32I-WITHFP-NEXT: ret
%1 = alloca %struct.large
call void @callee_large_struct_ret(%struct.large* sret %1)
call void @callee_large_struct_ret(%struct.large* sret(%struct.large) %1)
%2 = getelementptr inbounds %struct.large, %struct.large* %1, i32 0, i32 0
%3 = load i32, i32* %2
%4 = getelementptr inbounds %struct.large, %struct.large* %1, i32 0, i32 3

4
test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
View File

@ -479,7 +479,7 @@ define void @caller_large_scalar_ret() nounwind {
; Check return of >2x xlen structs
define void @callee_large_struct_ret(%struct.large* noalias sret %agg.result) nounwind {
define void @callee_large_struct_ret(%struct.large* noalias sret(%struct.large) %agg.result) nounwind {
; RV64I-LABEL: callee_large_struct_ret:
; RV64I: # %bb.0:
; RV64I-NEXT: sw zero, 4(a0)
@ -520,7 +520,7 @@ define i64 @caller_large_struct_ret() nounwind {
; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret
%1 = alloca %struct.large
call void @callee_large_struct_ret(%struct.large* sret %1)
call void @callee_large_struct_ret(%struct.large* sret(%struct.large) %1)
%2 = getelementptr inbounds %struct.large, %struct.large* %1, i64 0, i32 0
%3 = load i64, i64* %2
%4 = getelementptr inbounds %struct.large, %struct.large* %1, i64 0, i32 3

6
test/CodeGen/RISCV/musttail-call.ll
View File

@ -11,10 +11,10 @@
%struct.A = type { i32 }
declare void @callee_musttail(%struct.A* sret %a)
define void @caller_musttail(%struct.A* sret %a) {
declare void @callee_musttail(%struct.A* sret(%struct.A) %a)
define void @caller_musttail(%struct.A* sret(%struct.A) %a) {
; CHECK: LLVM ERROR: failed to perform tail call elimination on a call site marked musttail
entry:
musttail call void @callee_musttail(%struct.A* sret %a)
musttail call void @callee_musttail(%struct.A* sret(%struct.A) %a)
ret void
}

6
test/CodeGen/RISCV/tail-calls.ll
View File

@ -137,19 +137,19 @@ entry:
%struct.A = type { i32 }
@a = global %struct.A zeroinitializer
declare void @callee_struct(%struct.A* sret %a)
declare void @callee_struct(%struct.A* sret(%struct.A) %a)
define void @caller_nostruct() nounwind {
; CHECK-LABEL: caller_nostruct
; CHECK-NOT: tail callee_struct
; CHECK: call callee_struct
entry:
tail call void @callee_struct(%struct.A* sret @a)
tail call void @callee_struct(%struct.A* sret(%struct.A) @a)
ret void
}
; Do not tail call optimize if caller uses structret semantics.
declare void @callee_nostruct()
define void @caller_struct(%struct.A* sret %a) nounwind {
define void @caller_struct(%struct.A* sret(%struct.A) %a) nounwind {
; CHECK-LABEL: caller_struct
; CHECK-NOT: tail callee_nostruct
; CHECK: call callee_nostruct

4
test/CodeGen/SPARC/2011-01-22-SRet.ll
View File

@ -2,7 +2,7 @@
%struct.foo_t = type { i32, i32, i32 }
define weak void @make_foo(%struct.foo_t* noalias sret %agg.result, i32 %a, i32 %b, i32 %c) nounwind {
define weak void @make_foo(%struct.foo_t* noalias sret(%struct.foo_t) %agg.result, i32 %a, i32 %b, i32 %c) nounwind {
entry:
;CHECK-LABEL: make_foo:
;CHECK: ld [%sp+64], {{.+}}
@ -23,7 +23,7 @@ entry:
;CHECK: st {{.+}}, [%sp+64]
;CHECK: unimp 12
%f = alloca %struct.foo_t, align 8
call void @make_foo(%struct.foo_t* noalias sret %f, i32 10, i32 20, i32 30) nounwind
call void @make_foo(%struct.foo_t* noalias sret(%struct.foo_t) %f, i32 10, i32 20, i32 30) nounwind
%0 = getelementptr inbounds %struct.foo_t, %struct.foo_t* %f, i32 0, i32 0
%1 = load i32, i32* %0, align 8
%2 = getelementptr inbounds %struct.foo_t, %struct.foo_t* %f, i32 0, i32 1

2
test/CodeGen/SPARC/cast-sret-func.ll
View File

@ -10,7 +10,7 @@ define void @test() nounwind {
entry:
%tmp = alloca %struct, align 4
call void bitcast (void ()* @func to void (%struct*)*)
(%struct* nonnull sret %tmp)
(%struct* nonnull sret(%struct) %tmp)
ret void
}

14
test/CodeGen/SPARC/fp128.ll
View File

@ -23,7 +23,7 @@
; CHECK: std
; CHECK: std
define void @f128_ops(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a, fp128* byval(fp128) %b, fp128* byval(fp128) %c, fp128* byval(fp128) %d) {
define void @f128_ops(fp128* noalias sret(fp128) %scalar.result, fp128* byval(fp128) %a, fp128* byval(fp128) %b, fp128* byval(fp128) %c, fp128* byval(fp128) %d) {
entry:
%0 = load fp128, fp128* %a, align 8
%1 = load fp128, fp128* %b, align 8
@ -44,7 +44,7 @@ entry:
; CHECK-DAG: ldd [%[[S1]]], %f{{.+}}
; CHECK: jmp {{%[oi]7}}+12
define void @f128_spill(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
define void @f128_spill(fp128* noalias sret(fp128) %scalar.result, fp128* byval(fp128) %a) {
entry:
%0 = load fp128, fp128* %a, align 8
call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
@ -67,7 +67,7 @@ entry:
; CHECK-NEXT: add %g1, %sp, %g1
; CHECK-NEXT: ldd [%g1+8], %f{{.+}}
define void @f128_spill_large(<251 x fp128>* noalias sret %scalar.result, <251 x fp128>* byval(<251 x fp128>) %a) {
define void @f128_spill_large(<251 x fp128>* noalias sret(<251 x fp128>) %scalar.result, <251 x fp128>* byval(<251 x fp128>) %a) {
entry:
%0 = load <251 x fp128>, <251 x fp128>* %a, align 8
call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
@ -115,7 +115,7 @@ entry:
; BE: fabss %f0, %f0
; EL: fabss %f3, %f3
define void @f128_abs(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
define void @f128_abs(fp128* noalias sret(fp128) %scalar.result, fp128* byval(fp128) %a) {
entry:
%0 = load fp128, fp128* %a, align 8
%1 = tail call fp128 @llvm.fabs.f128(fp128 %0)
@ -130,7 +130,7 @@ declare fp128 @llvm.fabs.f128(fp128) nounwind readonly
; SOFT: _Q_itoq
; SOFT: unimp 16
define void @int_to_f128(fp128* noalias sret %scalar.result, i32 %i) {
define void @int_to_f128(fp128* noalias sret(fp128) %scalar.result, i32 %i) {
entry:
%0 = sitofp i32 %i to fp128
store fp128 %0, fp128* %scalar.result, align 8
@ -159,7 +159,7 @@ entry:
; SOFT: _Q_utoq
; SOFT: unimp 16
define void @uint_to_f128(fp128* noalias sret %scalar.result, i32 %i) {
define void @uint_to_f128(fp128* noalias sret(fp128) %scalar.result, i32 %i) {
entry:
%0 = uitofp i32 %i to fp128
store fp128 %0, fp128* %scalar.result, align 8
@ -242,7 +242,7 @@ entry:
; BE: fnegs %f0, %f0
; EL: fnegs %f3, %f3
define void @f128_neg(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
define void @f128_neg(fp128* noalias sret(fp128) %scalar.result, fp128* byval(fp128) %a) {
entry:
%0 = load fp128, fp128* %a, align 8
%1 = fsub fp128 0xL00000000000000008000000000000000, %0

4
test/CodeGen/SPARC/missing-sret.ll
View File

@ -1,8 +1,8 @@
; RUN: llc -march=sparc -filetype=obj < %s > /dev/null 2> %t2
define void @mul_double_cc({ double, double }* noalias sret %agg.result, double %a, double %b, double %c, double %d) {
define void @mul_double_cc({ double, double }* noalias sret({ double, double }) %agg.result, double %a, double %b, double %c, double %d) {
entry:
call void @__muldc3({ double, double }* sret %agg.result, double %a, double %b, double %c, double %d)
call void @__muldc3({ double, double }* sret({ double, double }) %agg.result, double %a, double %b, double %c, double %d)
ret void
}

2
test/CodeGen/SPARC/sret-secondary.ll
View File

@ -2,7 +2,7 @@
; CHECK: sparc only supports sret on the first parameter
define void @foo(i32 %a, i32* sret %out) {
define void @foo(i32 %a, i32* sret(i32) %out) {
store i32 %a, i32* %out
ret void
}

4
test/CodeGen/SystemZ/swifterror.ll
View File

@ -198,7 +198,7 @@ bb_end:
; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
; parameter.
define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
; CHECK-LABEL: foo_sret:
; CHECK-DAG: lgr %r[[REG1:[0-9]+]], %r2
; CHECK-DAG: lr %r[[REG2:[0-9]+]], %r3
@ -265,7 +265,7 @@ entry:
%s = alloca %struct.S, align 8
%error_ptr_ref = alloca swifterror %swift_error*
store %swift_error* null, %swift_error** %error_ptr_ref
call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
%error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
%had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
%tmp = bitcast %swift_error* %error_from_foo to i8*

2
test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
View File

@ -7,7 +7,7 @@
%struct.Results = type { float, float, float }
%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
define void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
define void @get_results(%struct.Results* noalias nocapture sret(%struct.Results) %agg.result, %struct.Village* %village) nounwind {
entry:
br i1 undef, label %bb, label %bb6.preheader

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