diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 0ead2b8340a..ed7bef667e7 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -525,7 +525,7 @@ void VirtRegRewriter::rewrite() {
         // Preserve semantics of sub-register operands.
         unsigned SubReg = MO.getSubReg();
         if (SubReg != 0) {
-          if (NoSubRegLiveness) {
+          if (NoSubRegLiveness || !MRI->shouldTrackSubRegLiveness(VirtReg)) {
             // A virtual register kill refers to the whole register, so we may
             // have to add implicit killed operands for the super-register.  A
             // partial redef always kills and redefines the super-register.
diff --git a/test/CodeGen/SystemZ/subregliveness-02.ll b/test/CodeGen/SystemZ/subregliveness-02.ll
new file mode 100644
index 00000000000..abdc223bcb8
--- /dev/null
+++ b/test/CodeGen/SystemZ/subregliveness-02.ll
@@ -0,0 +1,22 @@
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -systemz-subreg-liveness < %s | FileCheck %s
+
+; Check for successful compilation.
+; CHECK: meeb %f0, 0(%r1)
+
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
+target triple = "s390x-ibm-linux"
+
+; Function Attrs: nounwind
+define void @spec_random_load() #0 {
+bb:
+  %tmp = sitofp i64 undef to float
+  %tmp1 = fmul float %tmp, 0x3E00000000000000
+  %tmp2 = fpext float %tmp1 to double
+  %tmp3 = fmul double %tmp2, 2.560000e+02
+  %tmp4 = fptosi double %tmp3 to i32
+  %tmp5 = trunc i32 %tmp4 to i8
+  store i8 %tmp5, i8* undef, align 1
+  unreachable
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="z13" "target-features"="+transactional-execution,+vector" "unsafe-fp-math"="false" "use-soft-float"="false" }