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Test case for X86 LZCNT instruction selection.
llvm-svn: 141652
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38
test/CodeGen/X86/lzcnt.ll
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38
test/CodeGen/X86/lzcnt.ll
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; RUN: llc < %s -march=x86-64 -mattr=+lzcnt | FileCheck %s
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define i32 @t1(i32 %x) nounwind {
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%tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
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ret i32 %tmp
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; CHECK: t1:
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; CHECK: lzcntl
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}
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declare i32 @llvm.ctlz.i32(i32) nounwind readnone
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define i16 @t2(i16 %x) nounwind {
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%tmp = tail call i16 @llvm.ctlz.i16( i16 %x )
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ret i16 %tmp
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; CHECK: t2:
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; CHECK: lzcntw
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}
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declare i16 @llvm.ctlz.i16(i16) nounwind readnone
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define i64 @t3(i64 %x) nounwind {
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%tmp = tail call i64 @llvm.ctlz.i64( i64 %x )
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ret i64 %tmp
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; CHECK: t3:
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; CHECK: lzcntq
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}
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declare i64 @llvm.ctlz.i64(i64) nounwind readnone
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define i8 @t4(i8 %x) nounwind {
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%tmp = tail call i8 @llvm.ctlz.i8( i8 %x )
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ret i8 %tmp
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; CHECK: t4:
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; CHECK: lzcntw
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}
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declare i8 @llvm.ctlz.i8(i8) nounwind readnone
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