mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-31 20:51:52 +01:00
Fix for PR26180
Corresponds to Phabricator review: http://reviews.llvm.org/D16592 This fix includes both an update to how we handle the "generic" CPU on LE systems as well as Anton's fix for the Fast Isel issue. llvm-svn: 262233
This commit is contained in:
parent
4cf61e5269
commit
f9bc1afbcf
@ -1068,10 +1068,10 @@ unsigned PPCFastISel::PPCMoveToIntReg(const Instruction *I, MVT VT,
|
||||
if (!PPCEmitStore(MVT::f64, SrcReg, Addr))
|
||||
return 0;
|
||||
|
||||
// Reload it into a GPR. If we want an i32, modify the address
|
||||
// to have a 4-byte offset so we load from the right place.
|
||||
// Reload it into a GPR. If we want an i32 on big endian, modify the
|
||||
// address to have a 4-byte offset so we load from the right place.
|
||||
if (VT == MVT::i32)
|
||||
Addr.Offset = 4;
|
||||
Addr.Offset = (PPCSubTarget->isLittleEndian()) ? 0 : 4;
|
||||
|
||||
// Look at the currently assigned register for this instruction
|
||||
// to determine the required register class.
|
||||
|
@ -6163,11 +6163,11 @@ void PPCTargetLowering::LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
|
||||
MPI, false, false, 0);
|
||||
|
||||
// Result is a load from the stack slot. If loading 4 bytes, make sure to
|
||||
// add in a bias.
|
||||
// add in a bias on big endian.
|
||||
if (Op.getValueType() == MVT::i32 && !i32Stack) {
|
||||
FIPtr = DAG.getNode(ISD::ADD, dl, FIPtr.getValueType(), FIPtr,
|
||||
DAG.getConstant(4, dl, FIPtr.getValueType()));
|
||||
MPI = MPI.getWithOffset(4);
|
||||
MPI = MPI.getWithOffset(Subtarget.isLittleEndian() ? 0 : 4);
|
||||
}
|
||||
|
||||
RLI.Chain = Chain;
|
||||
|
@ -110,7 +110,7 @@ void PPCSubtarget::initializeEnvironment() {
|
||||
void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
|
||||
// Determine default and user specified characteristics
|
||||
std::string CPUName = CPU;
|
||||
if (CPUName.empty()) {
|
||||
if (CPUName.empty() || CPU == "generic") {
|
||||
// If cross-compiling with -march=ppc64le without -mcpu
|
||||
if (TargetTriple.getArch() == Triple::ppc64le)
|
||||
CPUName = "ppc64le";
|
||||
|
14
test/CodeGen/PowerPC/pr26180.ll
Normal file
14
test/CodeGen/PowerPC/pr26180.ll
Normal file
@ -0,0 +1,14 @@
|
||||
; RUN: llc -mcpu=generic -mtriple=powerpc64le-unknown-unknown -O0 < %s | FileCheck %s --check-prefix=GENERIC
|
||||
; RUN: llc -mcpu=ppc -mtriple=powerpc64le-unknown-unknown -O0 < %s | FileCheck %s
|
||||
|
||||
define i32 @bad(double %x) {
|
||||
%1 = fptoui double %x to i32
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; CHECK: fctidz 1, 1
|
||||
; CHECK: stfd 1, [[OFF:.*]](1)
|
||||
; CHECK: lwz {{[0-9]*}}, [[OFF]](1)
|
||||
; GENERIC: fctiwuz 1, 1
|
||||
; GENERIC: stfd 1, [[OFF:.*]](1)
|
||||
; GENERIC: lwz {{[0-9]*}}, [[OFF]](1)
|
Loading…
x
Reference in New Issue
Block a user