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[RISCV] Make VLEN no greater than 65536

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Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D106134
This commit is contained in:
jacquesguan 2021-07-17 12:45:34 +08:00 committed by Ben Shi
parent 81a5e12cd4
commit fa273ae7c0
2 changed files with 11 additions and 10 deletions
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3
lib/Target/RISCV/RISCVRegisterInfo.td
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@ -285,8 +285,7 @@ def FPR64C : RegisterClass<"RISCV", [f64], 64, (add
// Vector type mapping to LLVM types. // Vector type mapping to LLVM types.
// //
// Though the V extension allows that VLEN be as small as 8, // The V vector extension requires that VLEN >= 128 and <= 65536.
// this approach assumes that VLEN>=64.
// Additionally, the only supported ELEN values are 32 and 64, // Additionally, the only supported ELEN values are 32 and 64,
// thus `vscale` can be defined as VLEN/64, // thus `vscale` can be defined as VLEN/64,
// allowing the same types with either ELEN value. // allowing the same types with either ELEN value.

18
lib/Target/RISCV/RISCVSubtarget.cpp
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@ -109,30 +109,32 @@ unsigned RISCVSubtarget::getMaxRVVVectorSizeInBits() const {
assert(hasStdExtV() && "Tried to get vector length without V support!"); assert(hasStdExtV() && "Tried to get vector length without V support!");
if (RVVVectorBitsMax == 0) if (RVVVectorBitsMax == 0)
return 0; return 0;
assert(RVVVectorBitsMax >= 128 && isPowerOf2_32(RVVVectorBitsMax) && assert(RVVVectorBitsMax >= 128 && RVVVectorBitsMax <= 65536 &&
"V extension requires vector length to be at least 128 and a power of " isPowerOf2_32(RVVVectorBitsMax) &&
"2!"); "V extension requires vector length to be in the range of 128 to "
"65536 and a power of 2!");
assert(RVVVectorBitsMax >= RVVVectorBitsMin && assert(RVVVectorBitsMax >= RVVVectorBitsMin &&
"Minimum V extension vector length should not be larger than its " "Minimum V extension vector length should not be larger than its "
"maximum!"); "maximum!");
unsigned Max = std::max(RVVVectorBitsMin, RVVVectorBitsMax); unsigned Max = std::max(RVVVectorBitsMin, RVVVectorBitsMax);
return PowerOf2Floor(Max < 128 ? 0 : Max); return PowerOf2Floor((Max < 128 || Max > 65536) ? 0 : Max);
} }
unsigned RISCVSubtarget::getMinRVVVectorSizeInBits() const { unsigned RISCVSubtarget::getMinRVVVectorSizeInBits() const {
assert(hasStdExtV() && assert(hasStdExtV() &&
"Tried to get vector length without V extension support!"); "Tried to get vector length without V extension support!");
assert((RVVVectorBitsMin == 0 || assert((RVVVectorBitsMin == 0 ||
(RVVVectorBitsMin >= 128 && isPowerOf2_32(RVVVectorBitsMin))) && (RVVVectorBitsMin >= 128 && RVVVectorBitsMax <= 65536 &&
"V extension requires vector length to be at least 128 and a power of " isPowerOf2_32(RVVVectorBitsMin))) &&
"2!"); "V extension requires vector length to be in the range of 128 to "
"65536 and a power of 2!");
assert((RVVVectorBitsMax >= RVVVectorBitsMin || RVVVectorBitsMax == 0) && assert((RVVVectorBitsMax >= RVVVectorBitsMin || RVVVectorBitsMax == 0) &&
"Minimum V extension vector length should not be larger than its " "Minimum V extension vector length should not be larger than its "
"maximum!"); "maximum!");
unsigned Min = RVVVectorBitsMin; unsigned Min = RVVVectorBitsMin;
if (RVVVectorBitsMax != 0) if (RVVVectorBitsMax != 0)
Min = std::min(RVVVectorBitsMin, RVVVectorBitsMax); Min = std::min(RVVVectorBitsMin, RVVVectorBitsMax);
return PowerOf2Floor(Min < 128 ? 0 : Min); return PowerOf2Floor((Min < 128 || Min > 65536) ? 0 : Min);
} }
unsigned RISCVSubtarget::getMaxLMULForFixedLengthVectors() const { unsigned RISCVSubtarget::getMaxLMULForFixedLengthVectors() const {