RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
Code Issues Projects Releases Wiki Activity

Fixed regression due to commit 131709, which disables vararg tail call optimizations on Win64

Browse Source 
llvm-svn: 131740
This commit is contained in:
Chad Rosier 2011-05-20 17:49:39 +00:00
parent 9dbb570612
commit fa78ec1a3e
1 changed files with 24 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
test/CodeGen/X86/bool-zext.ll
View File

@ -1,8 +1,12 @@
; RUN: llc < %s -march=x86-64 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN64
; CHECK: @bar1
; CHECK: movzbl
; CHECK: jmp
; X64: @bar1
; X64: movzbl
; X64: jmp
; WIN64: @bar1
; WIN64: movzbl
; WIN64: callq
define void @bar1(i1 zeroext %v1) nounwind ssp {
entry:
%conv = zext i1 %v1 to i32
@ -10,9 +14,12 @@ entry:
ret void
}
; CHECK: @bar2
; CHECK-NOT: movzbl
; CHECK: jmp
; X64: @bar2
; X64-NOT: movzbl
; X64: jmp
; WIN64: @bar2
; WIN64-NOT: movzbl
; WIN64: callq
define void @bar2(i8 zeroext %v1) nounwind ssp {
entry:
%conv = zext i8 %v1 to i32
@ -20,11 +27,16 @@ entry:
ret void
}
; CHECK: @bar3
; CHECK: callq
; CHECK-NOT: movzbl
; CHECK-NOT: and
; CHECK: ret
; X64: @bar3
; X64: callq
; X64-NOT: movzbl
; X64-NOT: and
; X64: ret
; WIN64: @bar3
; WIN64: callq
; WIN64-NOT: movzbl
; WIN64-NOT: and
; WIN64: ret
define zeroext i1 @bar3() nounwind ssp {
entry:
%call = call i1 @foo2() nounwind